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參數(shù)資料
型號: TPS65950ZXNR
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PBGA209
封裝: 7 X 7 MM, 0.40 MM PITCH, PLASTIC, BGA-209
文件頁數(shù): 40/167頁
文件大小: 2566K
代理商: TPS65950ZXNR
VIO
PERIPH1
Device
VIO
PERIPH2
VIO
PERIPHn
CLKREQ
032-064
TPS65950
Integrated Power Management/Audio Codec
SWCS032 – OCTOBER 2008
www.ti.com
system about the clock request and starts a timer (maximum of 5.2 ms using the 32.768-kHz clock). When
the timer expires, the TPS65950 opens a gated clock, the timer automatically reloads the defined value,
and a high-frequency output clock signal is available through the HFCLKOUT pin. The output drive of
HFCLKOUT is programmable (minimum load 10 pF, maximum load 40 pF) and must be at 40 pF by
default.
With a register setting, the mirroring of CLKEN can be enabled on CLKEN2. When this mirroring feature is
not enabled, CLKEN2 can be used as a GP output controlled through I2C accesses.
CLKREQ, when enabled, has a weak pulldown resistor to support the wired-OR clock request.
Figure 12-3 shows an example of the wired-OR clock request.
Figure 12-3. Example of Wired-OR Clock Request
NOTE
The timer default value must be the worst case (10 ms) for the clock providers. For legacy
or workaround support, the signals NSLEEP1 and NSLEEP2 can also be used as a clock
request even if it is not their primary goal. By default, this feature is disabled and must be
enabled individually by setting the register bits associated with each signal.
Clock Specifications
134
相關(guān)PDF資料
PDF描述
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