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參數資料
| 型號： | TSC2008TRGVRQ1 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC16 |
| 封裝： | 4 X 4 MM, PLASTIC, VQFN-16 |
| 文件頁數： | 25/35頁 |
| 文件大?。?/td> | 418K |
| 代理商： | TSC2008TRGVRQ1 |
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t
DEVICE_READY
1.2Vto3.6V
0.9V
0.3V
0V
V
DD
t
VDD_OFF_RAMP
t
VDD_OFF
t
VDD_ON_RAMP
Temperature( C)
°
V
OffTimeforV
alidPOR(s)
D
-40
-20
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
20
40
60
80
100
RecommendedV
OffTime
forT = 40 Cto+85 C
-
°
DD
A
TypicalV
OffTimeforVariousTemperatures
DD
SBAS552
– JUNE 2011
Power-On Reset
During TSC2008-Q1 power up, an internal power-on reset (POR) is triggered if the power-supply ramping meets
the timing requirements shown in Figure 38 and listed in Table 9. The recommended and typical VDD off times
are shown in Figure 39. The POR brings the TSC2008-Q1 to the default working condition. If the system is not
able to meet the power ramping timing requirements, or if the system is not properly reset (even after a POR),
then including the SureSet reset in the initialization routine is recommended.
Figure 38. Power-On Reset Timing
Table 9. Timing Requirements for Figure 38
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
tVDD_OFF_RAMP
TA = –40°C to +105°C
2
kV/s
TA = –40°C to +105°C
1
s
tVDD_OFF
TA = –20°C to +105°C
0.3
s
tVDD_ON_RAMP
TA = –40°C to +105°C
12
kV/s
tDEVICE_READY
TA = –20°C to +105°C
2
ms
Figure 39. VDD Off Time vs Temperature
Copyright
2011, Texas Instruments Incorporated
31
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