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參數資料
| 型號： | AD7707BR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 3 V/5 V, +-10 V Input Range, 1 mW 3-Channel 16-Bit, Sigma-Delta ADC |
| 中文描述： | 3-CH 16-BIT DELTA-SIGMA ADC, SERIAL ACCESS, PDSO20 |
| 封裝： | 0.300 INCH, SOIC-20 |
| 文件頁數： | 2/40頁 |
| 文件大小： | 316K |
| 代理商： | AD7707BR |
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REV. A
–2–
AD7707–SPECIFICATIONS
noted. All specifications T
MIN
to T
MAX
unless otherwise noted.)
Parameter
B Version
1
Units
Conditions/Comments
STATIC PERFORMANCE
Low Level Input Channels (AIN1 and AIN2)
No Missing Codes
Output Noise
Integral Nonlinearity
2
Unipolar Offset Error
Unipolar Offset Drift
4
Bipolar Zero Error
Bipolar Zero Drift
4
16
See Tables I and III
±
0.003
See Note 3
0.5
See Note 3
0.5
0.1
See Note 3
0.5
See Note 3
0.5
±
0.003
1
0.6
Bits min
Guaranteed by Design. Filter Notch < 60 Hz
Depends on Filter Cutoffs and Selected Gain
Filter Notch < 60Hz. Typically
±
0.0003%
% of FSR max
μ
V/
°
C typ
μ
V/
°
C typ
μ
V/
°
C typ
For Gains 1, 2 and 4
For Gains 8, 16, 32, 64 and 128
Positive Full-Scale Error
5
Full-Scale Drift
4, 6
Gain Error
Gain Drift
4, 8
Bipolar Negative Full-Scale Error
2
Bipolar Negative Full-Scale Drift
4
μ
V/
°
C typ
ppm of FSR/
°
C typ
% of FSR max
μ
V/
°
C typ
μ
V/
°
C typ
Typically
±
0.0007%
For Gains of 1 to 4
For Gains of 8 to 128
HIGH LEVEL INPUT CHANNEL (AIN3)
No Missing Codes
Output Noise
Integral Nonlinearity
2
Unipolar Offset Error
9
Unipolar Offset Drift
Bipolar Zero Error
9
Bipolar Zero Drift
16
See Tables IV and VI
±
0.003
±
10
4
±
10
4
1
±
0.2
0.5
±
0.0012
Bits min
Guaranteed by Design. Filter Notch < 60Hz
Depends on Filter Cutoffs and Selected Gain
Filter Notch < 60Hz. Typically
±
0.0003%
Typically Within
±
1.5 mV
% of FSR max
mV max
μ
V/
°
C typ
mV max
μ
V/
°
C typ
μ
V/
°
C typ
% typ
ppm of FSR/
°
C typ
% of FSR typ
Typically Within
±
1.5 mV
For Gains 1, 2 and 4
For Gains 8, 16, 32, 64 and 128
Typically Within
±
0.05%
Gain Error
Gain Drift
Negative Full-Scale Error
2
LOW LEVEL ANALOG INPUTS/REFERENCE INPUTS
Input Common-Mode Rejection (CMR)
2
AV
DD
= 5 V
Gain = 1
Gain = 2
Gain = 4
Gain = 8 to 128
AV
DD
= 3 V
Gain = 1
Gain = 2
Gain = 4
Gain = 8 to 128
Normal-Mode 50 Hz Rejection
2
Normal-Mode 60 Hz Rejection
2
Common-Mode 50 Hz Rejection
2
Common-Mode 60 Hz Rejection
2
Absolute/Common-Mode REF IN Voltage
2
Absolute/Common-Mode AIN Voltage
2, 10
Specifications for AIN and REF IN Unless Noted
Low Level Input Channels, AIN1 and AIN2
100
105
110
130
dB typ
dB typ
dB typ
dB typ
105
110
120
130
98
98
150
150
AGND to AV
DD
AGND – 100 mV
AV
+ 30mV
AGND + 50mV
AV
DD
– 1.5V
1
10
0 to +V
/GAIN
12
±
V
/GAIN
GAIN
×
f
CLKIN
/64
f
CLKIN
/8
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
dB typ
V min to V max
V min
V max
V min
V max
nA max
pF max
nom
nom
For Filter Notches of 10 Hz, 25 Hz, 50 Hz,
±
0.02
×
f
NOTCH
For Filter Notches of 10 Hz, 20 Hz, 60 Hz,
±
0.02
×
f
NOTCH
For Filter Notches of 10 Hz, 25 Hz, 50 Hz,
±
0.02
×
f
NOTCH
For Filter Notches of 10 Hz, 20 Hz, 60 Hz,
±
0.02
×
f
NOTCH
BUF Bit of Setup Register = 0
BUF Bit of Setup Register = 1
AIN DC Input Current
2
AIN Sampling Capacitance
2
AIN Differential Voltage Range
11
BUF = 0
Unipolar Input Range (B/U Bit of Setup Register = 1)
Bipolar Input Range (B/U Bit of Setup Register = 0)
For Gains of 1 to 4
For Gains of 8 to 128
AIN Input Sampling Rate, f
S
Reference Input Range
REF IN(+) – REF IN(–) Voltage
1/1.75
V min/max
AV
DD
= 2.7 V to 3.3 V. V
REF
= 1.225 V
±
1% for
Specified Performance
AV
= 4.75 V to 5.25 V. V
REF
= 2.5 V
±
1% for
Specified Performance
REF IN(+) – REF IN(–) Voltage
1/3.5
V min/max
REF IN Input Sampling Rate, f
S
±
100 mV INPUT RANGE
f
CLKIN
/64
Low Level Input Channels, (AIN1 and AIN2)
Gain = 16, Unbuffered Mode
Filter Notch < 60 Hz
INL
2
Input Common-Mode Rejection (CMR)
2
Power Supply Rejection (PSR)
2
±
0.003
80
90
% of FSR max
dB typ
dB typ
(AV
DD
= DV
DD
= +3 V or 5 V, REF IN(+) = +1.225V with AV
DD
= 3 V and +2.5 V with AV
DD
= 5 V; REFIN(–) = GND; VBIAS = REFIN(+); MCLK IN = 2.4576MHz unless otherwise
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