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參數(shù)資料
| 型號(hào)： | AD7723 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 16-Bit, 1.2 MSPS CMOS, Sigma-Delta ADC |
| 中文描述： | 16位，120 MSPS的的CMOS，Σ-Δ模數(shù)轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 3/23頁(yè) |
| 文件大?。?/td> | 435K |
| 代理商： | AD7723 |
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–3–
REV. 0
AD7723
B Version
Typ
Parameter
Test Conditions/Comments
Min
Max
Units
ANALOG INPUTS (Continued)
Absolute Input Voltage
Input Sampling Capacitance
Input Sampling Rate, f
CLKIN
VIN(+) and/or VIN(–)
AGND
AV
DD
V
pF
MHz
2
19.2
CLOCK
CLKIN Duty Ratio
45
55
%
REFERENCE
REF1 Output Resistance
Using Internal Reference
REF2 Output Voltage
REF2 Output Voltage Drift
Using External Reference
REF2 Input Impedance
REF2 External Voltage Range
3
k
2.39
2.54
60
2.69
V
ppm/
°
C
REF1 = AGND
4
2.5
k
V
1.2
3.15
STATIC PERFORMANCE
Resolution
Differential Nonlinearity
Integral Nonlinearity
DC CMRR
Offset Error
Gain Error
5
16
Bits
LSB
LSB
dB
mV
% FSR
Guaranteed Monotonic
±
0.5
±
2
80
±
20
±
0.5
±
1
LOGIC INPUTS (Excluding CLKIN)
V
INH
, Input High Voltage
V
INL
, Input Low Voltage
2.0
V
V
0.8
CLOCK INPUT (CLKIN)
V
INH
, Input High Voltage
V
INL
, Input Low Voltage
3.8
V
V
0.4
ALL LOGIC INPUTS
I
IN
, Input Current
C
IN
, Input Capacitance
V
IN
= 0 V to DV
DD
±
10
10
μ
A
pF
LOGIC OUTPUTS
V
OH
, Output High Voltage
V
OL
, Output Low Voltage
|I
OUT
| = 200
μ
A
|I
OUT
| = 1.6 mA
4.0
V
V
0.4
POWER SUPPLIES
AV
DD
I
AVDD
4.75
5.25
60
33
5.25
35
20
200
V
mA
mA
V
mA
mA
μ
W
HALF_PWR = Logic Low
HALF_PWR = Logic High
50
25
DV
DD
I
DVDD
4.75
HALF_PWR = Logic Low
HALF_PWR = Logic High
Standby Mode
25
15
Power Consumption
6
NOTES
1
Operating temperature range is as follows: B Version: –40
°
C to +85
°
C.
2
Typical values for SNR apply for parts soldered directly to a printed circuit board ground plane.
3
Dynamic specifications apply for input signal frequencies from dc to 0.0240
×
f
in decimate by 16 mode and from dc to 0.0120
×
f
in decimate by 32 mode.
4
When using the internal reference, THD and SFDR specifications apply only to input signals above 10 kHz with a 10
μ
F decoupling capacitor between REF2 and
AGND2. At frequencies below 10 kHz, THD degrades to 84 dB and SFDR degrades to 86 dB.
5
Gain Error excludes Reference Error.
6
CLKIN and digital inputs static and equal to 0 or DV
DD
.
Specifications subject to change without notice.
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