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參數(shù)資料
| 型號(hào)： | AD9864-EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | IF Digitizing Subsystem |
| 中文描述： | 中頻數(shù)字化子系統(tǒng) |
| 文件頁(yè)數(shù)： | 16/44頁(yè) |
| 文件大小： | 1984K |
| 代理商： | AD9864-EB |
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AD9864
Address (Hex)
0x13
Rev. 0 | Page 16 of 44
Bit
Breakdown
(7:0)
Width
8
Default
Value
0x3C
Name
CKN (7:0)
Description
Synthesized frequency divisor (8 LSBs of a 13-bit word).
Default yields 300 kHz from 18 MHz; Minimum = 3,
Maximum = 8191.
Enable fast acquire.
Invert charge pump (0 = source current to increase VCO
frequency).
Charge pump current in normal operation.
I
PUMP
= (CKI + 1) × 0.625 mA.
Manual control of CLK charge pump (0 = Off, 1 = Up, 2 = Down,
and 3 = Normal).
CK fast acquire time unit (6 LSBs of a 14-bit word).
CK fast acquire time unit (8 LSBs of a 14-bit word).
0x14
(6)
(5)
1
1
0
0
CKF
CKINV
(4:2)
3
0x00
CKI
(1:0)
2
0x03
CKTM
0x15
0x16
SSI CONTROL
0x18
(5:0)
(7:0)
6
8
0x00
0x04
CKFA (13:8)
CKFA (7:0)
(7:0)
8
0x12
SSICRA
SSI Control Register A. See Table 8. Default is FS and CLKOUT
three-stated.
SSI Control Register B. See Table 8 (16-Bit Data, maximum drive
strength).
Output rate divisor. f
CLKOUT
= f
CLK
/SSIORD.
0x19
(7:0)
8
0x07
SSICRB
0x1A
ADC TUNING
0x1C
0x1D
0x1E
0x1F
(3:0)
4
0x01
SSIORD
(1)
(0)
(3:0)
(5:0)
(7:0)
1
1
3
6
8
0
0
0x00
0x00
0x00
TUNE_LC
TUNE_RC
CAPL1 (2:0)
CAPL0 (5:0)
CAPR
Perform tuning on LC portion of the ADC (cleared when done).
Perform tuning on RC portion of the ADC (cleared when done).
Coarse capacitance setting of LC tank (LSB is 25 pF, differential).
Fine capacitance setting of LC tank (LSB is 0.4 pF, differential).
Capacitance setting for RC resonator (64 LSB of fixed
capacitance).
TEST REGISTERS AND SPI PORT READ ENABLE
0x37–0x39
(7:0)
0x3A
(7:4)
(3)
(2:0)
0x3B
(7:4)
(3)
(2:0)
0x3C–0x3E
(7:0)
0x3F
(7:0)
8
4
1
3
4
1
3
8
8
0x00
0x00
0
0x00
0x00
0
0x00
0x00
Subject
to
Change
TEST
TEST
SPIREN
TEST
TEST
TRI
TEST
TEST
ID
Factory test mode. Do not use.
Factory test mode. Do not use.
Enable read from SPI port.
Factory test mode. Do not use.
Factory test mode. Do not use.
Three-state DOUTB.
Factory test mode. Do not use.
Factory Test mode. Do not use.
Revision ID (read-only); A write of 0x99 to this register is
equivalent to a power-on reset.
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| AD9864BCPZ | IF Digitizing Subsystem |
| AD9864BCPZRL | IF Digitizing Subsystem |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9864-EBZ | 功能描述:BOARD EVAL FOR AD9864 制造商:analog devices inc. 系列:- 零件狀態(tài):有效 類型:數(shù)字轉(zhuǎn)換器 頻率:10MHz ~ 300MHz 配套使用產(chǎn)品/相關(guān)產(chǎn)品:AD9864 所含物品:板 標(biāo)準(zhǔn)包裝:1 |
| AD9865 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9865BCP | 制造商:Analog Devices 功能描述:Mixed Signal Front End 64-Pin LFCSP EP 制造商:Analog Devices 功能描述:MIXED SGNL FRONT END 64LFCSP EP - Trays 制造商:Analog Devices 功能描述:10BIT MIXED SIGNAL CONVERTER 9865 |
| AD9865BCPRL | 制造商:Analog Devices 功能描述:Mixed Signal Front End 64-Pin LFCSP EP T/R |
| AD9865BCPZ | 功能描述:IC PROCESSOR FRONT END 64LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點(diǎn):- 封裝/外殼:48-TQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤 |
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