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參數資料
| 型號： | AD9864 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | IF Digitizing Subsystem |
| 中文描述： | 中頻數字化子系統 |
| 文件頁數： | 42/44頁 |
| 文件大小： | 1984K |
| 代理商： | AD9864 |
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AD9864
0
105
S
95
BW (kHz)
85
80
80
120
140
160
40
20
60
100
100
90
MIN ATTEN WITH
24-BIT I/Q DATA
MAX ATTEN WITH
16-BIT I/Q DATA
MIN ATTEN WITH
16-BIT I/Q DATA
MAX ATTEN WITH
24-BIT I/Q DATA
f
CLK
= 18MSPS
0
Figure 74.
Hung Mixer SNR vs. BW and VGA
LAYOUT EXAMPLE, EVALUATION BOARD, AND
SOFTWARE
The evaluation board and its accompanying software provide a
simple way to evaluate the AD9864. The block diagram in
which is designed to be flexible, allowing configuration for different applications.
The power supply distribution block provides filtered, adjust-
able voltages to the various supply pins of the AD9864. In the
IF input signal path, component pads are available to implement
different IF impedance matching networks. The LO and CLK
signals can be externally applied or internally derived from a
user-supplied VCO module interface daughter board. The refer-
ence for the on-chip LO and CLK synthesizers can be applied via
the external f
REF
input or an on-board crystal oscillator.
The evaluation board is designed to interface to a PC via a
National Instruments NI 6533 digital IO card. An XILINX FPGA
formats the data between the AD9864 and digital I/O card.
MIXER
INPUT
DUT
IF
INPUT
LO
INPUT
VCO
MODULE
INTERFACE
CRYSTAL
OSCILLATOR
(OPTIONAL)
IDT
FIFO
POWER SUPPLY
DISTRIBUTION
EPROM
CLK
INPUT
FREF
INPUT
N
C
XILINX
SPARTON
FPGA
AD9864
0
Figure 75.
Evaluation Board Platform
Software developed using National Instruments’ LabVIEW
(and provided as Microsoft Windows executable programs) is
supplied for the configuration of the SPI port registers and
evaluation of the AD9864 output data. These programs have a
convenient graphical user interface that allows for easy access
to the various SPI port configuration registers and frequency
analysis of the output data.
For more information on the AD9864 evaluation board, includ-
ing an example layout, please refer to the EVAL-AD9874EB
Data Sheet
(
www.analog.com/Analog_Root/static/pdf/techSupport/AD987
4EB_0.pdf
).
Rev. 0 | Page 42 of 44
相關PDF資料 |
PDF描述 |
|---|---|
| AD9864-EB | IF Digitizing Subsystem |
| AD9864BCPZ | IF Digitizing Subsystem |
| AD9864BCPZRL | IF Digitizing Subsystem |
| AD9866BCPRL | Broadband Modem Mixed Signal Front End |
| AD9866CHIPS | Broadband Modem Mixed Signal Front End |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9864BCP | 制造商:Analog Devices 功能描述:IF SUBSYS 48LFCSP EP - Bulk |
| AD9864BCPZ | 功能描述:IC IF SUBSYSTEM GEN-PURP 48LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點:- 封裝/外殼:48-TQFP 裸露焊盤 供應商設備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤 |
| AD9864BCPZ | 制造商:Analog Devices 功能描述:IC, IF SUBSYSTEM, 16-24BIT, 6.8KHZ-270KH |
| AD9864BCPZRL | 功能描述:IC IF SUBSYSTEM GEN-PURP 48LFCSP RoHS:是 類別:RF/IF 和 RFID >> RF 前端 (LNA + PA) 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:250 系列:- RF 型:GPS 頻率:1575.42MHz 特點:- 封裝/外殼:48-TQFP 裸露焊盤 供應商設備封裝:48-TQFP 裸露焊盤（7x7） 包裝:托盤 |
| AD9864-EB | 制造商:Analog Devices 功能描述: |
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