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參數資料
| 型號： | AD9875 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Broadband Modem Mixed-Signal Front End |
| 中文描述： | 寬帶調制解調器混合信號前端 |
| 文件頁數： | 4/24頁 |
| 文件大小： | 288K |
| 代理商： | AD9875 |
REV. 0
–4–
AD9875–SPECIFICATIONS
T est
Level
Parameter
T emp
Min
T yp
Max
Unit
T x PAT H INT ERFACE
Maximum Input Nibble Rate, 2
×
Interp.
T x-Set Up T ime (t
SU
)
T x-Hold T ime (t
HD
)
Rx PAT H INT ERFACE
Maximum Output Nibble Rate
Rx-DataValid T ime (t
VT
)
Rx-Data Hold T ime (t
HT
)
CMOS LOGIC INPUT S
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current
Logic “0” Current
Input Capacitance
Full
Full
Full
II
II
II
128
3.0
0
MHz
ns
ns
Full
Full
Full
I
II
II
110
MHz
ns
ns
3.0
1.5
Full
Full
Full
Full
25
°
C
II
II
II
II
III
V
DRVDD
– 0.7
V
V
μ
A
μ
A
μ
F
0.4
12
12
3
CMOS LOGIC OUT PUT S (1 mA Load)
Logic “1” Voltage
Logic “0” Voltage
Digital Output Rise/Fall T ime
Full
Full
Full
II
II
II
V
DRVDD
– 0.6
V
V
ns
0.4
2.5
1.5
POWER SUPPLY
All Blocks Powered Up
I
S_T OT AL
(T otal Supply Current)
I
S_T OT AL
(T x_QUIET Pin Asserted)
Digital Supply Current (I
DRVDD
+ I
DVDD
)
Analog Supply Current (I
AVDD
)
Power Consumption of Functional Blocks:
Rx LPF
ADC and FPGA
Rx Reference
Interpolator
DAC
PLL-B
PLL-A
Voltage Regulator Controller
All Blocks Powered Down
Supply Current I
S
, f
OSCIN
= 32 MHz
Supply Current I
S
, f
OSCIN
Idle
Power Supply Rejection
T x Path (
V
S
= 10%)
Rx Path (
V
S
= 10%)
SERIAL CONT ROL BUS
Maximum SCLK Frequency (f
SCLK
)
Clock Pulsewidth High (t
PWH
)
Clock Pulsewidth Low (t
PWL
)
Clock Rise/Fall T ime
Data/Chip-Select Setup T ime (t
DS
)
Data Hold T ime (t
DH
)
Data Valid T ime (t
DV
)
RECEIVE-T O-T RANSMIT ISOLAT ION
(10 MHz, Full-Scale Sinewave Output/Output)
Isolation: T x Path to Rx Path, Gain = +36 dB
Isolation: Rx Path to T x Path, Gain = –6 dB
Full
25
°
C
25
°
C
25
°
C
I
III
III
III
262
172
77
185
288
mA
mA
mA
mA
25
°
C
25
°
C
25
°
C
25
°
C
25
°
C
25
°
C
25
°
C
25
°
C
III
III
III
III
III
III
III
III
110
55
2
33
18
8
24
1
mA
mA
mA
mA
mA
mA
mA
mA
Full
Full
II
II
19
10
22
12
mA
mA
25
°
C
25
°
C
III
III
62
54
dB
dB
Full
Full
Full
Full
Full
Full
Full
II
II
II
II
II
II
II
25
18
18
MHz
ns
ns
ms
ns
ns
ns
1
25
0
20
25
°
C
25
°
C
III
III
–75
–70
dB
dB
VOLT AGE REGULAT OR CONT ROLLER
Output Voltage (V
FB
with SI2301 Connected)
Line Regulation (
V
FB%
/
V
DVDD%
×
100%)
Load Regulation (
V
FB
/
I
LOAD
)
Maximum Load Current (I
LOAD
)
Full
25
°
C
25
°
C
Full
I
III
III
II
1.25
1.30
100
60
1.35
V
%
m
mA
250
Specifications subject to change without notice.
(continued)
相關PDF資料 |
PDF描述 |
|---|---|
| AD9875-EB | Broadband Modem Mixed-Signal Front End |
| AD9875BST | Broadband Modem Mixed-Signal Front End |
| AD9876 | Broadband Modem Mixed-Signal Front End |
| AD9876-EB | Broadband Modem Mixed-Signal Front End |
| AD9876BST | Broadband Modem Mixed-Signal Front End |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9875BST | 制造商:Analog Devices 功能描述:Modem Chip Single 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10B BROADBAND MODEM MXFE CONVERTER - Tape and Reel |
| AD9875BSTRL | 制造商:Analog Devices 功能描述:Modem Chip Single 48-Pin LQFP T/R |
| AD9875BSTZ | 制造商:Analog Devices 功能描述:Modem Chip Single 48-Pin LQFP |
| AD9875-EB | 制造商:Analog Devices 功能描述: |
| AD9876 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
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