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參數資料
| 型號： | ADSP-21MOD980N-000 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網絡 |
| 英文描述： | CAP 27PF 100V 10% X7R AXIAL BULK M-MIL-PRF-39014 |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA352 |
| 封裝： | 35 X 35 MM, PLASTIC, BGA-352 |
| 文件頁數： | 21/42頁 |
| 文件大?。?/td> | 566K |
| 代理商： | ADSP-21MOD980N-000 |
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21
REV. PrB
6/2001
For current information contact Analog Devices at (800) ANALOGD
ADSP-21mod980N
PRELIMINARY TECHNICAL DATA
POWER DISSIPATION
To determine total power dissipation in a specific applica-
tion, the following equation should be applied for each
output:
C V
DD
2
f
C = load capacitance
f = output switching frequency
Example:
In an application where an external host is accessing inter-
nal memory and no other outputs are active, power
dissipation is calculated as follows:
Assumptions:
Assumptions:
External data memory is accessed every fourth cycle
with 50% of the address pins switching.
External data memory writes occur every fourth cycle
with 50% of the data pins switching.
Each address and data pin has a 64 pF total load at the
pin.
Application operates at V
DDEXT
= 3.3 V and t
CK
= 30 ns.
Total Power Dissipation = P
INT
+ (
C
V
DDEXT
2
f)
P
INT
= internal power dissipation from
Figure 15
(C
V
DDEXT
2
f)
is calculated for each output, as in the
example in
Table 7
.
Total power dissipation for this example is:
PD = P
INT
+ 222.7 mW
Table 7. Example Power Dissipation Calculation
Parameters
# of Pins
× C (pF)
× V
DDEXT
2
(V)
× f (MHz)
PD (mW)
Address
8
64
3.3
2
18.8
104.8
Data Output, WR
9
64
3.3
2
18.8
117.9
222.7
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