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參數(shù)資料
| 型號(hào)： | ADSP-21MOD980N-000 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | CAP 27PF 100V 10% X7R AXIAL BULK M-MIL-PRF-39014 |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PBGA352 |
| 封裝： | 35 X 35 MM, PLASTIC, BGA-352 |
| 文件頁(yè)數(shù)： | 34/42頁(yè) |
| 文件大小： | 566K |
| 代理商： | ADSP-21MOD980N-000 |
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34
6/2001
REV. PrB
For current information contact Analog Devices at (800) ANALOGD
ADSP-21mod980N
PRELIMINARY TECHNICAL DATA
IDMA Read, Short Read Cycle
Table 16. IDMA Read, Short Read Cycle
1
Parameter
Description
Min.
Max
Unit
Timing Requirements:
t
IKR
IACK Low before Start of Read
2
0
ns
t
IRP
Duration of Read
10
ns
Switching Characteristics:
t
IKHR
IACK High after Start of Read
2, 3
10
ns
t
IKDH
IAD[15:0] Data Hold after End of Read
3, 4
0
ns
t
IKDD
IAD[15:0] Data Disabled after End of Read
3, 4
10
ns
t
IRDE
IAD[15:0] Previous Data Enabled after Start of Read
3
0
ns
t
IRDV
IAD[15:0] Previous Data Valid after Start of Read
3
10
ns
t
IRDH
1
IAD[15:0] Previous Data Hold after Start of Read
(DM/PM1)
3,5
2t
CK
- 5
ns
t
IRDH
2
IAD[15:0] Previous Data Hold after Start of Read (PM2)
3, 6
t
CK
- 5
ns
1
Timing applies to ADSP-21mod980N when Short Read Only mode is disabled. See
Table on page 35
.
2
Start of Read = IS Low and IRD Low.
3
For IDMA, please refer to the
ADSP-2100 Family User
’
s Manual
.
4
End of Read = IS High or IRD High.
5
DM read or first half of PM read.
6
Second half of PM read.
Figure 26. IDMA Read, Short Read Cycle
IACK
IS
IR D
tIKR
tIKHR
tIRDE
tIRDV
Previous Data
New Read Data
IAD[15:0]
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