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參數資料
| 型號： | ADUC824 |
| 廠商： | Analog Devices, Inc. |
| 元件分類： | 串行ADC |
| 英文描述： | MicroConverter, Dual-Channel 16-/24-Bit ADCs with Embedded FLASH MCU |
| 中文描述： | MicroConverter的，雙通道ADC的16-/24-Bit與嵌入式閃存MCU |
| 文件頁數： | 40/68頁 |
| 文件大小： | 1060K |
| 代理商： | ADUC824 |
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REV. B
ADuC824
–40–
ECON—Flash/EE Memory Control SFR
This SFR acts as a command interpreter and may be written with
one of five command modes to enable various read, program and
erase cycles as detailed in Table XIII.
Table XIII. ECON–Flash/EE Memory Control Register
Command Modes
Command
Byte
Command Mode
01H
READ COMMAND
Results in four bytes being read into EDATA1–4
from memory page address contained in EADRL.
PROGRAM COMMAND
Results in four bytes (EDATA1–4) being written
to memory page address in EADRL. This write
command assumes the designated “write” page has
been pre-erased.
RESERVED FOR INTERNAL USE
03H should not be written to the ECON SFR.
VERIFY COMMAND
Allows the user to verify if data in EDATA1–4 is
contained in page address designated by EADRL.
A subsequent read of the ECON SFR will result
in a “zero” being read if the verification is valid;
a nonzero value will be read to indicate an invalid
verification.
ERASE COMMAND
Results in an erase of the 4-byte page designated
in EADRL.
ERASE-ALL COMMAND
Results in erase of the full Flash/EE Data memory
160-page (640 bytes) array.
RESERVED COMMANDS
Commands reserved for future use.
02H
03H
04H
05H
06H
07H to FFH
Flash/EE Memory Timing
The typical program/erase times for the Flash/EE Data Memory are:
Erase Full Array (640 Bytes) – 2 ms
Erase Single Page (4 Bytes) – 2 ms
Program Page (4 Bytes) – 250
μ
s
Read Page (4 Bytes) – Within Single Instruction Cycle
Using the Flash/EE Memory Interface
As with all Flash/EE memory architectures, the array can be pro-
grammed in-system at a byte level, although it must be erased
first; the erasure being performed in page blocks (4-byte pages
in this case).
A typical access to the Flash/EE Data array will involve setting
up the page address to be accessed in the EADRL SFR, config-
uring the EDATA1–4 with data to be programmed to the array
(the EDATA SFRs will not be written for read accesses) and
finally, writing the ECON command word which initiates one
of the six modes shown in Table XIII.
It should be noted that a given mode of operation is initiated as
soon as the command word is written to the ECON SFR. The
core microcontroller operation on the ADuC824 is idled until the
requested Program/Read or Erase mode is completed.
In practice, this means that even though the Flash/EE memory
mode of operation is typically initiated with a two-machine cycle
MOV instruction (to write to the ECON SFR), the next instruc-
tion will not be executed until the Flash/EE operation is complete
(250
μ
s or 2 ms later). This means that the core will not respond
to Interrupt requests until the Flash/EE operation is complete,
although the core peripheral functions like Counter/Timers will
continue to count and time as configured throughout this period.
Erase-All
Although the 640-byte User Flash/EE array is shipped from the
factory pre-erased, i.e., Byte locations set to FFH, it is nonethe-
less good programming practice to include an erase-all routine as
part of any configuration/setup code running on the ADuC824.
An “ERASE-ALL” command consists of writing “06H” to the
ECON SFR, which initiates an erase of all 640 byte locations in
the Flash/EE array. This command coded in 8051 assembly would
appear as:
MOV ECON, #06H
; Erase all Command
; 2 ms Duration
Program a Byte
In general terms, a byte in the Flash/EE array can only be pro-
grammed if it has previously been erased. To be more specific,
a byte can only be programmed if it already holds the value FFH.
Because of the Flash/EE architecture, this erasure must happen
at a page level; therefore, a minimum of four bytes (1 page) will
be erased when an erase command is initiated.
A more specific example of the Program-Byte process is shown
below. In this example the user writes F3H into the second
byte on Page 03H of the Flash/EE Data Memory space while
preserving the other three bytes already in this page. As the user
is only required to modify one of the page bytes, the full page must
be first read so that this page can then be erased without the exist-
ing data being lost.
This example, coded in 8051 assembly, would appear as:
MOV EADRL,#03H
MOV ECON,#01H
MOV EDATA2,#0F3H ; Write New Byte
MOV ECON,#05H
MOV ECON,#03H
; Set Page Address Pointer
; Read Page
; Erase Page
; Write Page (Program Flash/EE)
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PDF描述 |
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| ADUC824BS | MicroConverter, Dual-Channel 16-/24-Bit ADCs with Embedded FLASH MCU |
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| ADUC831BCP | Circular Connector; No. of Contacts:6; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:9; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:9-35 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ADUC824BCP | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 8KB Flash 3.3V/5V 56-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 8KB FLASH 12.58MHZ 3.3/5V 56LFCSP - Bulk |
| ADUC824BCP-REEL | 制造商:Analog Devices 功能描述:MCU 8-Bit ADuC8xx 8052 CISC 8KB Flash 3.3V/5V 56-Pin LFCSP EP T/R |
| ADUC824BCPZ | 功能描述:IC MCU 8K FLASH ADC/DAC 56LFCSP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:MicroConverter® ADuC8xx 標準包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設備:欠壓檢測/復位，LED，POR，PWM，WDT 輸入/輸出數:16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數據轉換器:- 振蕩器型:內部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND |
| ADUC824BS | 制造商:Analog Devices 功能描述:MCU 8-bit ADuC8xx 8052 CISC 8KB Flash 3.3V/5V 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:8BIT CISC 8KB FLASH 12.58MHZ 3.3/5V 52MQFP - Bulk 制造商:Analog Devices 功能描述:8BIT MCU +24BIT ADC LQFP52 824 |
| ADUC824BS-DEN | 制造商:Analog Devices 功能描述: |
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