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參數資料
| 型號： | ADV7320 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| 中文描述： | 多格式視頻編碼器216兆赫六噪聲整形的12位DAC |
| 文件頁數： | 17/88頁 |
| 文件大?。?/td> | 1002K |
| 代理商： | ADV7320 |
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ADV7320/ADV7321
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Rev. 0 | Page 17 of 88
64
G
63
C
62
S
61
S
60
S
59
S
58
S
57
D
56
V
D
55
S
54
S
53
S
52
S
51
S
50
S
49
S
47
R
SET1
46
V
REF
45
COMP1
42
DAC C
43
DAC B
44
DAC A
48
S_BLANK
41
V
AA
40
AGND
39
DAC D
37
DAC F
36
COMP2
35
R
SET2
34
EXT_LF
33
RESET
38
DAC E
2
Y0
Y1
3
4
Y2
Y3
7
Y5
Y6
6
Y4
5
1
V
DD_IO
8
9
Y7
10
V
DD
12
Y8
13
Y9
14
C0
C1
15
16
C2
11
DGND
17
C
18
C
19
I
2
C
20
A
21
S
22
S
23
P
24
P
25
P
26
C
27
C
28
C
29
C
30
C
31
R
32
C
PIN 1
ADV7320/ADV7321
TOP VIEW
(Not to Scale)
0
Figure 19. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
11, 57
DGND
40
AGND
32
CLKIN_A
63
CLKIN_B
Input/Output Description
G
G
I
I
Digital Ground.
Analog Ground.
Pixel Clock Input for HD (74.25 MHz Only, PS Only (27 MHz), SD Only (27 MHz).
Pixel Clock Input. Requires a 27 MHz reference clock for progressive scan mode or a 74.25 MHz
(74.1758 MHz) reference clock in HDTV mode. This clock is only used in dual modes.
Compensation Pin for DACs. Connect 0.1 μF capacitor from COMP pin to V
AA
.
45, 36
COMP1,
COMP2
DAC A
DAC B
DAC C
DAC D
O
44
43
42
39
O
O
O
O
CVBS/Green/Y/Y Analog Output.
Chroma/Blue/U/Pb Analog Output.
Luma/Red/V/Pr Analog Output.
In SD Only Mode: CVBS/Green/Y Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Y/Green [HD] Analog Output.
In SD Only Mode: Luma/Blue/U Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Pr/Red Analog Output.
In SD Only Mode: Chroma/Red/V Analog Output; in HD Only Mode and Simultaneous HD/SD
Mode: Pb/Blue [HD] Analog Output.
Video Horizontal Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Vertical Sync Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Blanking Control Signal for HD in Simultaneous SD/HD Mode and HD Only Mode.
Video Blanking Control Signal for SD Only.
Video Vertical Sync Control Signal for SD Only.
Video Horizontal Sync Control Signal for SD Only.
SD or Progressive Scan/HDTV Input Port for Y Data. Input port for interleaved progressive scan
data. The LSB is set up on Pin Y0. For 8-bit data input, LSB is set up on Y2.
Progressive Scan/HDTV Input Port 4:4:4 Input Mode. This port is used for the Cb[Blue/U] data.
The LSB is set up on Pin C0. For 8-bit data input, LSB is set up on C2.
38
DAC E
O
37
DAC F
O
23
24
25
48
49
50
13,12,
9–2
30–26,
18–14
P_HSYNC
P_VSYNC
P_BLANK
S_BLANK
S_VSYNC
S_HSYNC
Y9 to Y0
I
I
I
I/O
I/O
I/O
I
C9 to C0
I
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