
ADV7320/ADV7321
FEATURES
OUTPUT CONFIGURATION
Table 23, Table 24, and Table 25 demonstrate what output signals are assigned to the DACs when the control bits are set accordingly.
Table 23. Output Configuration in SD Only Mode
RGB/YUV Output
0x02, Bit 5
0x42, Bit 2
0x42, Bit 1
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Rev. 0 | Page 41 of 88
SD DAC Output 1
SD DAC Output 2
DAC A
CVBS
G
G
CVBS
CVBS
Y
Y
CVBS
DAC B
Luma
B
Luma
B
Luma
U
Luma
U
DAC C
Chroma
R
Chroma
R
Chroma
V
Chroma
V
DAC D
G
CVBS
CVBS
G
Y
CVBS
CVBS
Y
DAC E
B
Luma
B
Luma
U
Luma
U
Luma
DAC F
R
Chroma
R
Chroma
V
Chroma
V
Chroma
Luma/Chroma Swap 0x44, Bit 7
0 Table as above
1 Table as above, but with all luma/chroma instances swapped
Table 24. Output Configuration in HD/PS Only Mode
HD/PS Input
Format
0x15, Bit 1
YCrCb 4:2:2
0
YCrCb 4:2:2
0
YCrCb 4:2:2
0
YCrCb 4:2:2
0
YCrCb 4:4:4
0
YCrCb 4:4:4
0
YCrCb 4:4:4
0
YCrCb 4:4:4
0
RGB 4:4:4
1
RGB 4:4:4
1
RGB 4:4:4
1
RGB 4:4:4
1
HD/PS RGB Input
RGB/YPrPb Output
0x02, Bit 5
0
0
1
1
0
0
1
1
0
0
1
1
HD/PS Color Swap
0x15, Bit 3
0
1
0
1
0
1
0
1
0
1
0
1
DAC A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
DAC B
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
DAC C
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
DAC D
G
G
Y
Y
G
G
Y
Y
G
G
G
G
DAC E
B
R
Pb
Pr
B
R
Pb
Pr
B
R
B
R
DAC F
R
B
Pr
Pb
R
B
Pr
Pb
R
B
R
B
Table 25. Output Configuration in Simultaneous SD and HD/PS Only Mode
RGB/YPrPb Output
0x02, Bit 5
ITU-R.BT656 and HD
YCrCb in 4:2:2
ITU-R.BT656 and HD
YCrCb in 4:2:2
ITU-R.BT656 and HD
YCrCb in 4:2:2
ITU-R.BT656 and HD
YCrCb in 4:2:2
Input Formats
HD/PS Color Swap
0x15, Bit 3
0
DAC A
CVBS
DAC B
Luma
DAC C
Chroma
DAC D
G
DAC E
B
DAC F
R
0
0
1
CVBS
Luma
Chroma
G
R
B
1
0
CVBS
Luma
Chroma
Y
Pb
Pr
1
1
CVBS
Luma
Chroma
Y
Pr
Pb