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參數資料
| 型號： | ISP1301BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Universal Serial Bus On-The-Go transceiver |
| 中文描述： | LINE TRANSCEIVER, PQCC24 |
| 封裝： | 4 X 4 MM, 0.85 MM HEIGHT, LEAD FREE AND HALOGEN FREE, PLASTIC, MO-220, SOT-616-1, HVQFN-24 |
| 文件頁數： | 24/46頁 |
| 文件大小： | 245K |
| 代理商： | ISP1301BS |
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Philips Semiconductors
ISP1301
USB OTG transceiver
Product data
Rev. 01 — 14 April 2004
24 of 46
9397 750 11355
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
12. Clock wake up scheme
This section explains the ISP1301 clock stop timing, events triggering the clock to
wake up, and the timing of the clock wake up.
12.1 Power down event
The clock is stopped when the GLOBAL_PWR_DN bit is set. It takes approximately
8 ms for the clock to stop from the time the power down condition is detected. The
clock always stops at its falling edge. The waveform is given in
Figure 6
.
12.2 Clock wake up events
The clock wakes up when any of the following events occur on the ISP1301 pins:
SCL goes LOW
V
BUS
goes above the session valid threshold (0.8 V to 2.0 V), provided the
SESS_VLD bit in the Interrupt Enable High register is set.
ID changes when mini-A plug is inserted, provided the ID_FLOAT bit in the
Interrupt Enable Low register is set.
ID changes when mini-A plug is removed, provided the ID_FLOAT bit in the
Interrupt Enable High register is set.
DP goes HIGH, provided the DP_HI bit in the Interrupt Enable High register is set.
DM goes HIGH, provided the DM_HI bit in the Interrupt Enable High register is set.
The event triggers the clock to start and a stable clock is guaranteed after about six
clock periods, which is approximately 8
μ
s. The startup analog clock time is 10
μ
s.
Therefore, the total estimated start time after a triggered event is about 20
μ
s. The
clock will always start at its rising edge.
Waveforms of the clock wake up because of different events are given in
Figure 7
,
Figure 8
,
Figure 9
,
Figure 10
and
Figure 11
.
Fig 6.
Clock stopped using the GLOBAL_PWR_DN bit.
004aaa217
SCL
GLOBAL_PWR_DN
CLOCK
8 ms
Fig 7.
Clock wake up using SCL.
004aaa218
SCL
CLOCK
20
μ
s
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1301BS,115 | 功能描述:射頻收發器 USB OTG TRANSCEIVER RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1301BS,118 | 功能描述:射頻收發器 DO NOT USE ORDER -G OR -S PART RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1301BS,151 | 功能描述:射頻收發器 USB OTG TRANSCEIVER RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1301BS,157 | 功能描述:射頻收發器 DO NOT USE ORDER -G OR -S PART RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1301BSFA | 功能描述:IC USB OTG TRANSCEIVER 24HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發器 驅動器/接收器數:2/2 規程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應商設備封裝:16-PDIP 包裝:管件 |
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