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參數資料
| 型號： | ISP1301BS |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通用總線功能 |
| 英文描述： | Universal Serial Bus On-The-Go transceiver |
| 中文描述： | LINE TRANSCEIVER, PQCC24 |
| 封裝： | 4 X 4 MM, 0.85 MM HEIGHT, LEAD FREE AND HALOGEN FREE, PLASTIC, MO-220, SOT-616-1, HVQFN-24 |
| 文件頁數： | 9/46頁 |
| 文件大小： | 245K |
| 代理商： | ISP1301BS |
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Philips Semiconductors
ISP1301
USB OTG transceiver
Product data
Rev. 01 — 14 April 2004
9 of 46
9397 750 11355
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
8.9 Detailed description of pins
8.9.1
ADR/PSW
The ADR/PSW pin has two functions. On reset (including power-on reset), the level
on this pin is latched as ADR_REG, which represents the least significant bit (LSB) of
the I
2
C address of the ISP1301. If bit ADR_REG = 0, the I
2
C-bus address for the
ISP1301 is 0101100 (0x2C); if bit ADR_REG = 1, the I
2
C-bus address for the
ISP1301 is 0101101 (0x2D).
After reset, the ADR/PSW pin can be programmed as an output. If in the Mode
Control 2 register bit PSW_OE = 1, then the ADR/PSW output will be enabled. The
logic level will be determined by bit ADR_REG. If bit ADR_REG = 0, then the
ADR/PSW pin will drive HIGH. If bit ADR_REG = 1, then the ADR/PSW pin will drive
LOW.
The ADR/PSW pin can be used to turn on or off the external charge pump. The
ISP1301 built-in charge pump supports V
BUS
current at 8 mA. If the application needs
more current support (for example, 50 mA), an external charge pump may be
needed. In this case, the ADR/PSW pin can act as a power switch for the external
charge pump.
Figure 4
shows an example of using external charge pump.
8.9.2
SCL and SDA
The SCL (serial clock) and SDA (serial data) signals implement a two-wire serial
I
2
C-bus.
8.9.3
RESET_N
Active LOW asynchronous reset for all digital logic. Either connect this pin to V
DD_LGC
for power-on reset or apply a minimum of 10
μ
s LOW pulse for hardware reset.
8.9.4
INT_N
The INT_N (interrupt) pin is asserted while an interrupt condition exists. It is
deasserted when the Interrupt Latch register is cleared. The INT_N pin is open-drain,
and, therefore, can be connected using a wired-AND with other interrupt signals.
Fig 4.
Using external charge pump.
004aaa437
CHARGE PUMP
ADR/PSW
VBUS
+3.3 V
100 k
4.7
μ
F
VBUS
ID
DM
DP
GND
VOUT
VIN
ON/OFF
VBAT
ISP1301
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相關代理商/技術參數 |
參數描述 |
|---|---|
| ISP1301BS,115 | 功能描述:射頻收發器 USB OTG TRANSCEIVER RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1301BS,118 | 功能描述:射頻收發器 DO NOT USE ORDER -G OR -S PART RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1301BS,151 | 功能描述:射頻收發器 USB OTG TRANSCEIVER RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1301BS,157 | 功能描述:射頻收發器 DO NOT USE ORDER -G OR -S PART RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數據速率:2000 Kbps 調制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| ISP1301BSFA | 功能描述:IC USB OTG TRANSCEIVER 24HVQFN RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發器 驅動器/接收器數:2/2 規程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應商設備封裝:16-PDIP 包裝:管件 |
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