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參數資料
型號: ISP1501
英文描述: Hi-Speed Universal Serial Bus peripheral transceiver
中文描述: 高速通用串行總線外設收發器
文件頁數: 25/40頁
文件大小: 770K
代理商: ISP1501
Philips Semiconductors
ISP1501
Hi-Speed USB peripheral transceiver
Product data
Rev. 02 — 21 November 2002
25 of 40
9397 750 10025
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
[1]
[2]
[3]
HS termination resistor disabled, pull-up resistor connected. Only during reset, when both hub and device are high-speed capable.
Includes internal matching resistors on both pins DP and DM. This tolerance range complies to Hi-Speed USB.
In suspend mode the minimum voltage is 2.7 V.
16. Dynamic characteristics
V
HSOH
high-speed HIGH-level output
voltage (differential)
chirp-J output voltage (differential)
chirp-K output voltage (differential)
Leakage current
I
LZ
OFF-state leakage current
Capacitance
C
IN
transceiver capacitance
Resistance
Z
DRV2
driver output impedance for
Hi-Speed USB and Original USB
Z
INP
input impedance
Termination
V
TERM
termination voltage for pull-up
resistor on pin RPU
360
-
440
mV
V
CHIRPJ
V
CHIRPK
[1]
700
-
-
1100
500
mV
mV
[1]
900
-
-
±
1
μ
A
pin to GND
-
-
20
pF
steady-state drive
[2]
40.5
45
49.5
10
-
-
M
[3]
3.0
-
3.6
V
Table 13:
V
CCA
= V
CCD
= 3.0 to 3.6 V; V
AGND
= V
DGND
= 0 V; T
amb
=
40 to
+
85
°
C; unless otherwise specified.
Symbol
Parameter
Conditions
Static characteristics: analog I/O pins DP and DM)
…continued
Min
Typ
Max
Unit
Table 14:
V
CCA
= V
CCD
= 3.0 to 3.6 V; V
AGND
= V
DGND
= 0 V; T
amb
=
40 to
+
85
°
C; unless otherwise specified.
Symbol
Parameter
Conditions
Driver characteristics
Full-speed mode
t
FR
rise time
C
L
= 50 pF; 10% to 90% of
|
V
OH
V
OL
|
; see
Figure 21
t
FF
fall time
C
L
= 50 pF; 90% to 10% of
|
V
OH
V
OL
|
; see
Figure 21
FRFM
differential rise/fall time
matching (t
FR
/t
FF
)
from Idle state
V
CRS
output signal crossover
voltage
from Idle state; see
Figure 22
High-speed mode
t
HSR
high-speed differential
rise time
t
HSF
high-speed differential
fall time
Driver timing
Full-speed mode
t
PLH(drv)
driver propagation delay
(VO, FSE0 to DP, DM)
t
PHL(drv)
HIGH-to-LOW; see
Figure 24
Dynamic characteristics: analog I/O pins (DP/DM)
Min
Typ
Max
Unit
4
-
20
ns
4
-
20
ns
excluding the first transition
90
-
111.1
%
excluding the first transition
1.3
-
2.0
V
500
-
-
ps
500
-
-
ps
LOW-to-HIGH; see
Figure 24
-
-
-
-
15
15
ns
ns
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