
Philips Semiconductors
ISP1501
Hi-Speed USB peripheral transceiver
Product data
Rev. 02 — 21 November 2002
5 of 40
9397 750 10025
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
DP
7
AI/O
USB D
+
connection (analog) with integrated 45
series
resistor
analog supply voltage 2 (3.3 V)
connection for external pull-up resistor (1.5 k
±
5%) on
USB D
+
; switched on via internal switch during the FS and
HS chirp states
analog ground 2 supply
operating state and interface selection input 0; see
Table 3
operating state and interface selection input 1; see
Table 3
48 MHz clock output; clock is always running when input
SUSPEND is logic 0; see
Section 17
on application of this
clock
connection for external reference resistor (12 k
±
1%) to
analog ground supply
clock output for Hi-Speed USB digital interface (30 MHz);
clock is always running when input SUSPEND is logic 0
analog supply voltage 3 (3.3 V)
crystal oscillator output (12 MHz)
crystal oscillator input (12 MHz)
analog ground 3 supply
selects direction of 16-bit data bus DATA[15:0]
data bit 0; bi-directional, slew rate controlled output (5 ns)
data bit 1; bi-directional, slew rate controlled output (5 ns)
data bit 2; bi-directional, slew rate controlled output (5 ns)
data bit 3; bi-directional, slew rate controlled output (5 ns)
data bit 4; bi-directional, slew rate controlled output (5 ns)
data bit 5; bi-directional, slew rate controlled output (5 ns)
data bit 6; bi-directional, slew rate controlled output (5 ns)
data bit 7; bi-directional, slew rate controlled output (5 ns)
digital supply voltage 1 (3.3 V)
digital ground 1 supply
data bit 8; bi-directional, slew rate controlled output (5 ns)
data bit 9; bi-directional, slew rate controlled output (5 ns)
data bit 10; bi-directional, slew rate controlled output (5 ns)
data bit 11; bi-directional, slew rate controlled output (5 ns)
data bit 12; bi-directional, slew rate controlled output (5 ns)
data bit 13; bi-directional, slew rate controlled output (5 ns)
data bit 14; bi-directional, slew rate controlled output (5 ns)
data bit 15; bi-directional, slew rate controlled output (5 ns)
logic 0 —
DATA[7:0] = valid data, DATA[15:8] = valid data
V
CCA2
RPU
8
9
-
AI
AGND2
MODE0
MODE1
CLKOUT48
10
11
12
13
-
I
I
O
RREF
14
AI
CLKOUT30
15
O
V
CCA3
XTAL2
XTAL1
AGND3
DDIR
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
V
CCD1
DGND1
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
RX_LAST_BYTE
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
-
AO
AI
-
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
logic 1 —
DATA[7:0] = valid data, DATA[15:8] = bit stuff
error byte
digital supply voltage 2 (3.3 V)
V
CCD2
40
-
Table 2:
Symbol
[1]
Pin description
…continued
Pin
Type
Description