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參數資料
型號: ISP1501
英文描述: Hi-Speed Universal Serial Bus peripheral transceiver
中文描述: 高速通用串行總線外設收發器
文件頁數: 6/40頁
文件大?。?/td> 770K
代理商: ISP1501
Philips Semiconductors
ISP1501
Hi-Speed USB peripheral transceiver
Product data
Rev. 02 — 21 November 2002
6 of 40
9397 750 10025
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
[1]
[2]
Symbol names with an overscore (e.g. NAME) indicate active LOW signals.
FS: full-speed (Original USB); HS: high-speed (Hi-Speed USB).
DGND2
TX_LAST_BYTE
41
42
-
I
digital ground 2 supply
transmit last byte input; used in conjunction with
TX_BS_EN to indicate different handling of the upper and
lower data byte (see
Table 7
)
transmit ready output; a logic 1 means ISP1501 is ready to
accept data on the next rising clock edge of CLKOUT30
pin function depends on operating state (see
Table 3
):
TX_READY
43
O
TX_BS_EN/FSE0
44
I
State = 0, 1 —
a logic 1 forces single-ended zero (SE0) for
FS transmitter
State = 2, 3 —
a logic 1 enables bit stuffing for the HS
transmitter
pin function depends on operating state (see
Table 3
):
TEST_J_K/
VO
45
I
State = 0, 1 —
differential data for the FS transceiver input
State = 2, 3 —
a logic 1 enables Hi-Speed USB test
modes TEST_J and TEST_K; it also disables bit stuffing
and NRZI for the HS receiver and transmitter
pin function depends on operating state (see
Table 3
):
RX_BS_ERROR/
RCV
46
O
State = 0, 1 —
differential data at D
+
/D
receiver output
State = 2, 3 —
a logic 1 signals a bit stuff error on receive
data; the position of the erroneous byte is indicated by
RX_LAST_BYTE
pin function depends on operating state (see
Table 3
):
RX_INACTIVE/
VM
47
O
State = 0, 1 —
single-ended D
receiver output
State = 2, 3 —
a logic 1 indicates HS line inactivity
pin function depends on operating state (see
Table 3
):
RX_VALID/
VP
48
O
State = 0, 1 —
single-ended D
+
receiver output
State = 2, 3 —
valid data on falling clock edge at
pin CLKOUT30
Table 2:
Symbol
[1]
Pin description
…continued
Pin
Type
Description
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相關代理商/技術參數
參數描述
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