
LC6512A, LC6513A
No.2367–19/24
Appendix LC6500 Series Instruction Set (by Function)
Symbols Meaning
AC : Accumulator
ACt: Accumulator bit t
CF: Carry flag
CTL: Control register
DP: Data pointer
E : E register
EXTF: External interrupt request flag
Fn: Flag bit n
AC
←
(AC)+[M(DP)]
+(CF)
AC
←
(AC)+6
(AC)
[M(DP)]
←
←
AC
←
[M(DP)]
(AC)
[M(DP)]
DPH
←
(DPH)
0M2M1M0
2
0 0 0 0
1 0 1 0
1 0 1 0
1
M(DP)
←
(AC)
←
←
←
←
AC
←
(AC) [M(DP)]
Compare DPL with
immediate data
Load AC with
immediate data
Store AC to M
Load AC from M
Exchange AC with
M.then modify DPH
with immediate data
Exchange AC with M
AC
←
(AC)+10
AC
←
I3 I2 I1 l0
(DP
L
) I3 I2 I1 l0
I3 I2 I1 l0+(AC)+1
[M(DP)]+(AC)+1
AC
←
(AC) [M(DP)]
0 0 1 0
0 0 0 0
0 0 1 0
0 1 1 0
0 0 1 0
0 0 1 0
0 0 0 0
0 0 0 0
0 0 1 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 1 0
0 1 0 0
0 0 1 0
0 1 0 1
1 1 0 0
1 1 1 1
1 1 1 0
1 1 1 1
1 1 1 0
1 1 1 0
1 1 1 0
Rotate AC left through
CF
Tranfer AC to E
Exchange AC with E
lncrement M
Decrement M
Set M data bit
Reset M data bit
Add M to AC
Increment AC
Decrement AC
Complement AC
0 0 0 0
Or M to AC
And M to AC
Set CF
Compare AC with
immediate data
Compare AC with M
Exclusive or M to AC
Decimal adjust AC in
addition
Decimal adjust AC in
Subtraction
Add M to AC with CF
1
1
AC0
←
(CF).ACn+1
←
(ACn). CF
←
(AC3)
E
←
(AC)
(AC)
←
(E)
M(DP)
←
[M(DP)]+1
M(DP)
←
[M(DP)]–1
→
M(DP. B1B0)
←
0
AC
←
(AC)+[M(DP)]
M(DP. B1B0)–1
0 0 0 1
0 0 0 1
1
1
1 1 1 0
1 1 1 1
Clear CF
CF
←
0
CF
←
1
AC
←
(AC)
AC
←
(AC)
[M(DP)]
1 1 1 0
1 1 1 1
1
1 0 1 1
0 0 0 1
0 0 1 1
1 1 0 1
1 1 1 0
1 1 1 1
10B1B0
1
1
1
1
1
1
1 0 1 0
0 0 0 0
0 1 1 0
0 0 0 0
10B1B0
0 1 0 1
1
1
1
2
1
1
1 1 1 0
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
AC
←
(AC)–1
AC
←
(AC)+1
1
1
2
0 0 0 1
1
0M2M1M0
0 0 1 0
1 1 0 0
I3I2I1I0
I3I2I1I0
0 1 0 1
1 0 1 1
1 1 0 0
I3I2I1I0
1
1
1
2
2
0 1 1 1
1
C
ZF CF
ZF CF
ZF CF
B
ZF
ZF CF
Remarks
Status
flag
affected
Function
1
ZF
ZF
ZF
2
1
(AC)
[M(DP)]
DP
L
←
(DP
L
)–1
ZF CF
ZF
ZF
ZF
ZF
ZF
ZF
ZF
ZF
ZF CF
1
The ZF is set/
reset accoding to
the result of (DPH)
0M2M1M0.
The ZF is set/reset
accoding to the
DPH contents at
the time of instruc-
tion execution.
The ZF is set/reset
accoding to the
result of (DPL +1).
1 1 1 1
Instruction code
The ZF is set/reset
accoding to the
result of (DPL–1).
A
AC. E
←
ROM
(PCh.E. AC)
0 1 1 0
0 0 1 1
Read table data from
program ROM
2
1
ZF
A single bit of the M(DP) specified by B1 B0
The AC contents and the M(DP) contents
The AC,CF, M(DP) contents are binary-
added and the result is placed in the AC.
ZF CF
ZF CF
ZF CF
CF
CF
ZF
1
1 1 1 1
1 1 1 0
Exchange AC with M.
then increment DPL
ZF
2
(AC)
[M(DP)]
DP
L
←
(DP
L
)+1
D3D2D1D0
Exchange AC wIth M.
then decrement DPL
1 1 1 1
D7D6D5D4
Clear AC
0 0 0 0
AC
←
0
1
1
1 1 0 0
The AC contents are decremented –1.
The AC contents are shifted left through the
CF.
The AC contents are incremented +1.
The AC contents are complemented
(zero bits become 1,one bits become 0)
The CF is set.
The CF is reset.
Description
The AC contents and the M(DP) contents
are exchanged.Then, the DPL contents are
decremented –1.
The contents of ROM addressed by the PC
whose low-order 8 bits are replaced with the E
and AC contents are loaded in the AC and E.
The M (DP) contents are decremented –1.
A single bit of the M(DP)specified by B1 B0
The AC contents and the M(DP) contents
The AC contents and the M(DP) contents
The AC contents and the M(DP) contents
The M(DP) contents are incrementcd +1.
6 is added and to the AC contens.
10 is added to the AC contents.
The AC contents and the E contents are
The AC contents are transferred to the E.
The AC contents and the M(DP) contents
are compared and the CF and ZF are
set/reset.
The AC contents are stored in the M(DP).
Immediate data I3 I2 I1 I0 in loaded in the
The AC contents and immediate data
I3 I2 I1 I0 are compared and the ZF and CF
are set/reset.
The DPL contents and immediate data
I3 I2 I1 I0 are compared.
The AC contents and the M(DP) contents
are exchanged.Then, the DPL contents are
incremented +1.
The AC contents and the M(DP) contents
are exchanged.
The AC contents and the M(DP) contents
are exchanged.Then, the DPH contents are
modified with the contens of(DPH)
0M2M1M0.
The M(DP) contents are loaded in the AC.
The AC contents are cleared.
M
i
O
L
Mnemonic
RTBL
EXL
AND
CI data
OR
CM
DAS
AD
RMB bit
DAA
ADC
SMB bit
XI
CLI data
X
XD
LI data
S
L
XM data
DEC
RAL
DEM
CLA
CLC
XAE
INM
TAE
STC
CMA
INC
I
←
←
CF
0
ZF
0
1
Comparison result
[M(DP)] >(AC)
[M(DP)] =(AC)
[M(DP)] <(AC)
1
1
0
CF
0
ZF
0
1
Comparison result
I3I2l1l0 >(AC)
I3I2l1l0 =(AC)
I3I2l1l0 <(AC)
1
1
0
M: Memory
M(DP): Memory addressed by DP
P(DPL): Input/output port addressed by DPL
PC: Program counter
STACK: Stack register
TM : Timer
TMF : Timer (internal) interrupt request flag
At, Ha, La: Working register
ZF: Zero flag
( ),[ ]: Contents
←
: Transfer and direction
+ : Addition
– : Subtraction
: OR
: Exclusive OR
<
<
: AND