
LC6512A, LC6513A
No.2367–20/24
STACK
←
(PC)+2
PC11* to 0
←
OP10P9
P8P7P6P5P4P3P2P1P0
PC
←
(STACK)
STACK
←
(PC)+1
PC11 to 6.PC1 to 0
←
0
PC5 to 2
←
P3P2P1P0
PC7 to 0
←
(E, AC)
PC7 to 0
←
P7P6P5P4
P3P2P1P0
If ACt=1
DPL
←
(AC)
PC
←
(STACK)
CF ZF
←
CSF.ZSF
PC
←
PC11(orPC11)
P10P9P8P7P6P5
P4P3P2P1P0
PC7 to 0
←
P7P6P5P4
P3P2P1P0
If ACt=0
(AC) (DPH)
AC
←
(DPL)
(AC) (A0)
(AC) (A1)
(AC) (A2)
(AC) (A3)
(DPL) (L0)
(DPL) (L1)
Fn
←
1
(DPH) (H0)
(DPH) (H1)
1 0 t1 t0
P3P2P1P0
PC7 to 0
←
P7P6P5P4
P3P2P1P0
If [M(DP.t1t0)]=1
1 0 1 0
P7P6P5P4
1 0 1 1
0 1 1 0
0 0 0 1
0 1 0 1
1 1 1 1
0 0 1 0
0 0 1 1
P7P6P5P4
2
0 1 1 1
P7P6P5P4
0 1 t1 t0
P3P2P1P0
2
PC7 to 0
←
P7P6P5P4
P3P2P1P0
If [M(DP.t1t0)]=0
0 0 1 1
P7P6P5P4
0 1 1 1
P7P6P5P4
0 1 1 0
P7P6P5P4
Return from
subroutine
Returnn from interrupt
routine
Branch on AC bit
Call subroutine in the
Zero Page
1 1 1 1
1 1 1 1
Call subroutine in the
zero bank
Jump in the current
bank
Exchange DPL with
working register La
Exchange DPH with
working register Ha
Reset flag bit
Set flag bit
Branch on Port bit
the DPL.
The DPL contents are transferred to
The AC contents and the DPH
contents are exchanged.
Branch on no M bit
Branch on no AC bit
Branch on M bit
0 1 1 1
P7P6P5P4
1
1
I3 I2 I1 I0
DPH
←
I3I2I1I0
The AC contents are transferred to
The DPL contents are incremented
The DPH is loaded with immediate
data I3I2I1I0.
Increment DPL
Transfer AC to DPL
Transfer DPL to AC
0 1 0 0
Load DPH with
immediate data
Exchange AC with
DPH
Exchange AC with
working register At
Decrement DPL
Fn
←
0
1
0 0 1 1
t1 t0
0 0 0 0
0 1 0 0
1 0 0 0
1 1 0 0
a
1 0 0 0
1 1 0 0
a
0 0 0 0
0 1 0 0
B3B2B1B0
1 0 0 1
1 1 1 1
0 1 1 1
0 0 t1 t0
P3P2P1P0
1 P10P9P8
P3P2P1P0
0 0 1 0
B3B2B1B0
0 0 1 0
1 P10P9P8
P3P2P1P0
P3P2P1P0
1 0 1 0
1
1
2
2
1
2
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
DPL
←
(DPL)–1
DPL
←
(DPL)+1
1
1
1
1
1
1
1 1 1 1
0 0 1 0
1 1 1 0
1 1 1 0
1 1 1 0
1 1 1 0
1 1 1 0
1 1 1 0
1 1 1 0
1
1
1
1
1 1 1 0
1
2
1
0 0 t1 t0
P3P2P1P0
2
2
0 1 t1 t0
P3P2P1P0
2
1 1 1 1
1 1 1 1
2
1
1
1
1
1
1
1
1
Jump in the current
page modified by E
and AC
I
Remarks
B
Instruction code
Mnemonic
C
Status
flag
affected
Function
ZF CF
ZF
Description
Mnemonic is
BNM0 to
BNM3
according to
the value of t.
Mnemonic is
BP0 to BP3
according to
the value of t.
Mnemonic is
BA0 to BA3
according to
the value of t.
Mnemonic is
BNA0 to BNA3
according to
the value of t.
Mnemonic is
BM0 to BM3
according to
the value of t.
The flags are
divided into 4
groups of F0 to
F3,F4 to F7,F8 to
bits including a
single bit specified
bit specified by
TMF
0 1 1 1
P7P6P5P4
Branch on timer
Mnemonic is
BNP0 to BNP3
according to
the value of t.
BTTM
addr
J
W
i
F
B
If theTMF is 1,a branch to an address
specified by immediate data P7 to P0
within the current page occurs.The TMF
is reset.
D
1 1 0 0
P3P2P1P0
PC7 to 0
←
P7P6P5P4
P3P2P1P0
If TMF=1
then TMF
←
0
2
2
PC7 to 0
←
P7P6P5P4
P3P2P1P0
If [P(DPL.t1t0)]=0
ZF
ZF
D7D6D5D4
The AC contents and the contents of
working register A0, A1, A2, or A3
specified by t1 t0 are exchanged.
The DPH contents and the contents
of working register H0 or H1 specified
by a are exchanged.
The DPL contents and the contents of
working register L0 or L1 specified by
a are exchanged.
I3 I2 I1 I0
1
D3D2D1D0
1
The DPH and DPL are loaded with 0 and
immediate data I3I2I1I0 respectively.
DPH
←
0
DPL
←
I3I2I1I0
ZF
A return from an lnterrupt servicing
routine occurs.
If a single bit of the AC specified by
immediate data t1 t0 is 1,a branch to an
address specified by immediate data P7
to P0 within the current page occurs.
If a single bit of the AC specified by
immediate data t1t0 is 0,a branch to an
address specified by immediate data P7
to P0 within the current page occurs.
If a single bit of the M(DP) specified by
immediate data t1t0 is 1,a branch to an
address specified by immediate data P7
to P0 within the current page occurs.
If a single bit of the M(DP) specified by
immediate data t1t0 is 0,a branch to an
address specified by immediate data P7
to P0 within the current page occurs.
If a single bit of port P(DPL) specified by
immediate data t1 t0 is 1,a branch to an
address specified by immediate data P7
toP0 within the current page occurs.
If a single bit of port P(DPL) specified by
immediate data t1 t0 is 0,a branch to an
address specified by immediate data P7
to P0 within the current page occurs.
2
PC7 to 0
←
P7P6P5P4
P3P2P1P0
If [P(DPL.t1t0)]=1
A flag specified by B3B2B1B0 is
reset.
A flag specified by B3B2B1B0 is set.
A jump to an address specified by the
PC11(or PC11)and immediate data
P10 to P0 occurs.
A jump to an address specified by the
contents of the PC whose low-order 8
bits are replaced with the E and AC
contents occurs.
A subroutine in page 0 of bank 0 is
called.
A return from a subroutine occurs.
A subroutine in bank 0 is called.
JMP
addr
CZP
addr
BAt
addr
BPt
addr
BNMt
addr
BNAt
addr
CAL
addr
RTI
RT
BMt
addr
2
2
2
Branch on no Port bit
1 0 t1 t0
P3P2P1P0
BNPt
addr
0 0 1 1
P7P6P5P4
Load DPH With Zero and
DPL with immediate data
respectively
DED
TLA
TAL
lND
1 0 0 0
LDZ
date
LHI data
XAt
XA0
XA1
XA2
XA3
XHa
XH0
XH1
XLa
XL0
XL1
RFB
flag
SFB flag
JPEA
XAH