
Communications Processor (CP)
MOTOROLA
MC68302 USER’S MANUAL
4-121
W—Wrap (Final BD in Table)
0 = This is not the last BD in the Tx BD table.
1 = This is the last BD in the Tx BD table. After this buffer has been used, the V.110
controller will transmit data from the first BD in the table.
NOTE
The user is required to set the wrap bit in one of the first eight
BDs; otherwise, errant behavior may occur.
I—Interrupt
0 = No interrupt is generated after this buffer has been serviced.
1 = Either TX or TXE in the V.110 event register will be set when this buffer has been
serviced by the V.110 controller, which can cause interrupts.
L—Last
0 = This buffer is not the last in the message.
1 = This bit is set by the processor to indicate that this buffer is the last buffer in the
current frame. The V.110 controller will transmit ones until the next BD is ready.
Bit 10—Must be set to zero by the user.
Bits 9–2, 0—Reserved for future use.
The following bits are written by the V.110 controller after it has finished transmitting the
associated data buffer.
UN—Underrun
The V.110 controller encountered a transmitter underrun condition while transmitting the
associated data buffer.
Data Length
The data length is the number of octets that the V.110 controller should transmit from this
BD's data buffer. It is never modified by the CP. The data length should be greater than
zero.
Tx Buffer Pointer
This pointer, which contains the address of the associated data buffer, may be even or
odd. The buffer may reside in either internal or external memory.
NOTE
For correct operation of the function codes, the upper 8 bits of
the pointer must be initialized to zero.
4.5.15.9 V.110 Event Register
The SCC event register (SCCE) is referred to as the V.110 event register when the SCC is
configured as a V.110 controller. It is an 8-bit register used to report events recognized by
the V.110 channel and to generate interrupts. On recognition of an event, the V.110 control-