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參數資料
| 型號： | MPC9350 |
| 廠商： | Motorola, Inc. |
| 英文描述： | LOW VOLTAGE PLL CLOCK DRIVER |
| 中文描述： | 低壓PLL時鐘驅動器 |
| 文件頁數： | 4/12頁 |
| 文件大小： | 282K |
| 代理商： | MPC9350 |
MPC9350
MOTOROLA
TIMING SOLUTIONS
DC CHARACTERISTICS
(VCC = 3.3V
±
5%, TA = –40
°
to 85
°
C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VIH
VIL
VOH
VOL
Input high voltage
2.0
VCC + 0.3
0.8
V
LVCMOS
Input low voltage
-0.3
V
LVCMOS
IOH=-24 mA1.
IOL= 24 mA
IOL= 12 mA
VIN = 0V or VIN = VCC
Output High Voltage
2.4
V
Output Low Voltage
0.55
0.30
V
V
IIN
ZOUT
CIN
CPD
ICCA
ICC
VTT
1. The MPC9350 is capable of driving 50
transmission lines on the incident edge. Each output drives one 50
parallel terminated transmission
line to a termination voltage of VTT. Alternatively, the device drives up to two 50
series terminated transmission lines.
Input Current
200
μ
A
Output impedance
14 - 17
Input capacitance
4.0
pF
Power Dissipation Capacitance
10
pF
Per Output
Maximum PLL Supply Current
10
mA
VCCA Pin
All VCC Pins
Maximum Quiescent Supply Current
1.0
mA
Output termination voltage
VCC
÷
2
V
AC CHARACTERISTICS
(VCC = 3.3V
±
5% or VCC = 2.5V
±
5%, TA = –40
°
to 85
°
C)a
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
fref
Input Frequency
÷
16 feedback
÷
32 feedback
Static Test Mode
12.5
6.25
0
25
12.5
300
MHz
MHz
MHz
FBSEL = 1
FBSEL = 0
PLL_EN = 0
fXTAL
fVCO
fMAX
Crystal Oscillator Frequency
10
25
MHz
XTAL inputs
VCO Frequency
200
400
MHz
PLL_EN = 1
Maximum Output Frequency
÷
2 output
÷
4 output
÷
8 output
100
50
25
200
100
50
MHz
MHz
MHz
frefDC
tr, tf
Reference Input Duty Cycle
25
75
%
TLCK Input Rise/Fall Time
VCC = 2.5V
VCC = 3.3V
1.0
1.0
ns
ns
0.7V to 1.7V
0.8V to 2.0V
tsk(o)
tPW
tr, tf
tPLZ, HZ
tPZL, LZ
BW
Output-to-output Skew
45
150
ps
Output Duty Cycle
45
50
55
ps
T=Clock period
Output Rise/Fall Time
0.1
0.5
1.0
ns
see Figure 10.
Output Disable Time
10
ns
Output Enable Time
10
ns
PLL closed loop bandwidth
÷
16 feedback (VCC = 3.3V)
÷
16 feedback (VCC = 2.5V)
÷
32 feedback (VCC = 3.3V)
÷
32 feedback (VCC = 2.5V)
Cycle-to-cycle jitter
2.0 – 8.0
1.0 – 4.0
1.5 – 3.5
0.7 – 2.0
MHz
MHz
MHz
MHz
tJIT(CC)
single frequency
multiple frequencies
30
100
200
300
ps
ps
tJIT(PER)
Period Jitter
÷
16 feedback
÷
32 feedback
30
80
150
200
ps
ps
tLOCK
tJIT(
)
AC characteristics apply for parallel output termination of 50
to VTT
Maximum PLL Lock Time
1
ms
I/O Phase Jitter (RMS)
5 – 20
ps
RMS value
a.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| MPC9350AC | 功能描述:時鐘驅動器及分配 2.5 3.3V 200MHz Clock Generator RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC9350ACR2 | 功能描述:時鐘發生器及支持產品 FSL 1-9 LVCMOS PLL Clock Generator RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-56 |
| MPC9350D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:LOW VOLTAGE PLL CLOCK DRIVER |
| MPC9350FA | 功能描述:時鐘驅動器及分配 2.5 3.3V 200MHz Clock Generator RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| MPC9350FAR2 | 制造商:Integrated Device Technology Inc 功能描述:PLL Clock Driver Single 32-Pin LQFP T/R |
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