- 您現在的位置：買賣IC網 > PDF目錄382356 > N643GT5KI (Advanced Micro Devices, Inc.) 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory PDF資料下載
參數資料
| 型號： | N643GT5KI |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| 中文描述： | 64兆位（4個M x 16位）的CMOS 1.8伏，只有同時讀/寫，突發模式閃存 |
| 文件頁數： | 28/49頁 |
| 文件大小： | 382K |
| 代理商： | N643GT5KI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁
26
Am29BDS643G
25692A2 May 8, 2006
D A T A S H E E T
WRITE OPERATION STATUS
The device provides several bits to determine the status of a
program or erase operation: DQ2, DQ3, DQ5, DQ6, and
DQ7. Table 12 and the following subsections describe the
function of these bits. DQ7 and DQ6 each offers a method
for determining whether a program or erase operation is
complete or in progress.
DQ7: Data# Polling
The Data# Polling bit, DQ7, indicates to the host
system whether an Embedded Program or Erase algo-
rithm is in progress or completed, or whether a bank is
in Erase Suspend. Data# Polling is valid after the rising
edge of the final WE# pulse in the command sequence.
During the Embedded Program algorithm, the device
outputs on DQ7 the complement of the datum pro-
grammed to DQ7. This DQ7 status also applies to pro-
gramming during Erase Suspend. When the
Embedded Program algorithm is complete, the device
outputs the datum programmed to DQ7. The system
must provide the program address to read valid status
information on DQ7. If a program address falls within a
protected sector, Data# Polling on DQ7 is active for
approximately 1 μs, then that bank returns to the read
mode.
During the Embedded Erase algorithm, Data# Polling
produces a “0” on DQ7. When the Embedded Erase
algorithm is complete, or if the bank enters the Erase
Suspend mode, Data# Polling produces a “1” on DQ7.
The system must provide an address within any of the
sectors selected for erasure to read valid status infor-
mation on DQ7.
After an erase command sequence is written, if all
sectors selected for erasing are protected, Data#
Polling on DQ7 is active for approximately 100 μs, then
the bank returns to the read mode. If not all selected
sectors are protected, the Embedded Erase algorithm
erases the unprotected sectors, and ignores the
selected sectors that are protected. However, if the
system reads DQ7 at an address within a protected
sector, the status may not be valid.
Just prior to the completion of an Embedded Program
or Erase operation, DQ7 may change asynchronously
with DQ0–DQ6 while Output Enable (OE#) is asserted
low. That is, the device may change from providing
status information to valid data on DQ7. Depending on
when the system samples the DQ7 output, it may read
the status or valid data. Even if the device has com-
pleted the program or erase operation and DQ7 has
valid data, the data outputs on DQ0–DQ6 may be still
invalid. Valid data on DQ0–DQ7 will appear on succes-
sive read cycles.
Table 12 shows the outputs for Data# Polling on DQ7.
Figure 3 shows the Data# Polling algorithm. Figure 16
in the AC Characteristics section shows the Data#
Polling timing diagram.
Figure 3.
Data# Polling Algorithm
DQ7 = Data
Yes
No
No
DQ5 = 1
No
Yes
Yes
FAIL
PASS
Read DQ7–DQ0
Addr = VA
Read DQ7–DQ0
Addr = VA
DQ7 = Data
START
Notes:
1. VA = Valid address for programming. During a sector
erase operation, a valid address is any sector address
within the sector being erased. During chip erase, a valid
address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = “1” because
DQ7 may change simultaneously with DQ5.
相關PDF資料 |
PDF描述 |
|---|---|
| N643GT7GI | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| N643GT7MI | 64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| N80186 | High Integration 16-Bit Microprocessor iAPX86 Family |
| N80186-10 | High Integration 16-Bit Microprocessor iAPX86 Family |
| N80186-10B | High Integration 16-Bit Microprocessor iAPX86 Family |
相關代理商/技術參數 |
參數描述 |
|---|---|
| N643GT7GI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| N643GT7MI | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:64 Megabit (4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory |
| N6455A | 制造商:Agilent Technologies 功能描述:HARD COPY MANUAL, 4000X-SERIES OSCILLOSCOPE; Plug Type:-; Accessory Type:Hard Copy Manual; For Use With:InfiniiVision 4000 X-Series Oscilloscopes ;RoHS Compliant: NA |
| N6456A | 制造商:AGILENT TECHNOLOGIES, INC. 功能描述:Rackmount Kit for 2000 and 3000X Series Oscilloscopes 制造商:Agilent Technologies 功能描述:Bulk 制造商:Agilent Technologies 功能描述:OPTION RACK MOUNT KIT FOR X-SERIES 制造商:Agilent Technologies 功能描述:RACK MOUNT KIT; Accessory Type:Rackmount Kit; For Use With:Agilent InfiniiVision 2000X / 3000X Series Oscilloscopes ;RoHS Compliant: NA 制造商:Agilent Technologies 功能描述:Rack mount kit |
| N6457A | 制造商:AGILENT TECHNOLOGIES, INC. 功能描述:Soft Carrying Case and Front Panel Cover for 2000 and 3000X Series Scopes 制造商:Agilent Technologies 功能描述:Bulk 制造商:Agilent Technologies 功能描述:ACCESSORY SOFT CASE AND FRONT PANEL 制造商:Agilent Technologies 功能描述:ACCESSORY, SOFT CASE AND FRONT PANEL 制造商:Agilent Technologies 功能描述:SOFT CARRYING CASE AND FRONT PANEL COVER; Accessory Type:Case and Front Panel Cover; For Use With:Agilent InfiniiVision 2000X / 3000X Series Oscilloscopes ;RoHS Compliant: NA 制造商:Agilent Technologies 功能描述:Soft Carrying Case |
發布緊急采購，3分鐘左右您將得到回復。