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參數資料
| 型號： | TFP9431CPAP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | 10 X 10 MM, 1.40 MM HEIGHT, 0.50 MM PITCH, POWER, THERMALLY ENHANCED, PLASTIC, TQFP-64 |
| 文件頁數： | 12/18頁 |
| 文件大小： | 241K |
| 代理商： | TFP9431CPAP |
TFP9431
PanelBus
DVI RECEIVER WITH TRIPLE DAC
SLDS122A – MARCH 2000 – REVISED JUNE 2000
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
RED[7:0]
GRN[7:0]
BLU[7:0]
ARPr
_
+
Latch
Channel 2
_
+
Latch
Channel 1
_
+
Latch
Channel 0
_
+
PLL
Data Recovery
and
Synchronization
TMDS
Decoder
CH2[9:0]
CH1[9:0]
CH0[9:0]
1.8 V
Regulator
3.3 V
Internal 50-
Termination
3.3 V
Rx2+
Rx2-
Rx1+
Rx1-
Rx0+
Rx0-
RxC+
RxC-
DAC
Bandgap
Reference
Comp
FSADJ
VREF
AGY
ABPb
CTL[3:1]
ODCK
DE
HS
VS
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
I/O
DESCRIPTION
AGND
1,52,56,5
8,61
GND
Analog Ground – Ground reference and current return for analog circuitry.
AVCC
51,53,57,
64
VCC
Analog VCC – Power supply for analog circuitry. Nominally 3.3 V
A0
37
DI
The A0 configuration bit controls the HSYNC jitter fix mode of the chip.
1 : Normal mode with HSYNC fix
0 : Normal mode without HSYNC fix
BLUDAC
22
A
Analog blue output
COMP
20
A
Compensation for the internal reference amplifier. A 0.1
F capacitor should be connected between this pin
and DACVCC.
CTL[3:1]
31,32,33
DO
General-purpose control signals – Used for user defined control. In normal mode CTL1 is not powered-down
via PDO.
DACGND
24
GND
DAC ground – Ground reference and current return for the DACs.
DACVCC
19,27
VCC
DAC VCC – Power supply for the DACs. Nominally 3.3 V
DE
28
DO
Output data enable – Used to indicate time of active video display versus non-active display or blank time.
During blank, only HSYNC, VSYNC, and CTL1-3 are transmitted. During times of active display, or non-blank,
only video data, GRNDAC, REDDAC, BLUDAC is transmitted.
High : Active display time
Low: Blank time
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