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參數資料
| 型號： | THS8210PFP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | POWER, PLASTIC, TQFP-80 |
| 文件頁數： | 59/73頁 |
| 文件大小： | 2053K |
| 代理商： | THS8210PFP |
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THS8200/8210
‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH
THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION
TM COPY
PROTECTION
SLES032—6/18/02 3:33 PM
POST OFFICE BOX 655303 DALLAS TEXAS 77265
62
Copyright 2001 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
without notice.
csc_gfc3(9:0): G/Y input channel – R/Cr output
channel, fractional part
{csc_g31 0x0E(1:0) & csc_g32 0x0F(7:0)}
[0000000000]
10-bit fractional portion of coefficient multiplied with
G/Y input, to produce R/Cr output (magnitude format)
csc_bic1(5:0): B/Cb input channel – G/Y output
channel, integer part
{csc_b11 0x10(7:2)}
[000000]
6-bit integer portion of coefficient multiplied with B/Cb
input, to produce G/Y output (signed magnitude
format)
csc_bfc1(9:0): B/Cb input channel – G/Y output
channel, fractional part
{csc_b11 0x10(1:0) & csc_b12 0x11(7:0)}
[0000000000]
10-bit fractional portion of coefficient multiplied with
B/Cb input, to produce G/Y output (magnitude
format)
csc_bic2(5:0): B/Cb input channel – B/Cb output
channel, integer part
{csc_b21 0x12(7:2)}
[000000]
6-bit integer portion of coefficient multiplied with B/Cb
input, to produce B/Cb output (signed magnitude
format)
csc_bfc2(9:0): B/Cb input channel – B/Cb output
channel, fractional part
{csc_b21 0x12(1:0) & csc_b22 0x13(7:0)}
[0000000000]
10-bit fractional portion of coefficient multiplied with
B/Cb input, to produce B/Cb output (magnitude
format)
csc_bic3(5:0): B/Cb input channel – R/Cr output
channel, integer part
{csc_b31 0x14(7:2)}
[000000]
6-bit integer portion of coefficient multiplied with B/Cb
input, to produce R/Cr output (signed magnitude
format)
csc_bfc3(9:0): B/Cb input channel – R/Cr output
channel, fractional part
{csc_b31 0x14(1:0) & csc_b32 0x15(7:0)}
[0000000000]
10-bit fractional portion of coefficient multiplied with
B/Cb input, to produce R/Cr output (magnitude
format)
csc_offset1(9:0):
DAC channel 1 offset
{csc_offs1 0x16(7:0) & csc_offs12 0x17(7:6)}
[0000000000]
Offset value for G/Y output (signed magnitude
format).
csc_offset2(9:0):
DAC channel 2 offset
{csc_offs12 0x17(5:0) & csc_offs23 0x18(7:4)}
[0000000000]
Offset value for B/Cb output (signed magnitude
format).
csc_offset3(9:0):
DAC channel 3 offset
{csc_offs23 0x18(3:0) & csc_offs3 0x19(7:2)}
[0000000000]
Offset value for R/Cr output (signed magnitude
format).
csc_bypass:
Bypass for CSC block
{csc_offs3 0x19(1)}
[1]
0 : Color space conversion (CSC) not bypassed
1 : CSC bypassed
Test control (sub-addresses 0x1A-0x1B)
tst_digbypass:
Bypass to DAC inputs
{tst_cntl1 0x1A(7)}
[0]
0 : Normal operation; non-bypass
1 : Digital logic bypassed to directly control DACs
from input bus
tst_offset:
Bypass for DAC offsets
{tst_cntl1 0x1A(6)}
[0]
0 : Normal operation; logic not bypassed
1 : Programmed offsets are always added to DAC
codes regardless of mode or dtg_state.
tst_ydelay(1:0):
Y delay path control
{tst_cntl2 0x1B(7:6)}
[00]
Adjusts the delay of the Y channel during YCbCr
modes.
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