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參數(shù)資料
| 型號： | THS8210PFP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP80 |
| 封裝： | POWER, PLASTIC, TQFP-80 |
| 文件頁數(shù)： | 67/73頁 |
| 文件大?。?/td> | 2053K |
| 代理商： | THS8210PFP |
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THS8200/8210
‘ALL-FORMAT’ OVERSAMPLED COMPONENT VIDEO/PC GRAPHICS D/A SYSTEM WITH
THREE 11 BIT DAC’S, CGMS DATA INSERTION AND 525P MACROVISION
TM COPY
PROTECTION
SLES032—6/18/02 3:33 PM
POST OFFICE BOX 655303
DALLAS TEXAS 77265
7
Copyright 2001 Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data
and other specifications are design goals. Texas Instruments
reserves the right to change or discontinue these products
without notice.
Color space conversion (CSC)
The Color-Space-Converter block is used to convert input video data in one type of color space to output video
data in another color space (e.g. RGB to YCbCr, or vice versa). This block contains a 3x3 matrix multiplier/adder
and a 3x1 adder. All multiplier and adder coefficients can be programmed via the I2C interface to support any linear
matrixing+offset operation on the video data.
Clip/Shift/Multiplier (CSM)
The Clip-Shift-Multiply block optionally clips the input code range at a programmed low/high code; shifts the input
video data downwards, and multiplies the input by a programmable coefficient in the range 0-1.999. This allows for
operation with a reduced input code range such as prescribed in the ITU-R.BT601 recommendation. Each channel
can be independently programmed to accommodate different digital ranges for each of the three input channels.
E.g. for standard video signals, the Y channel has a digital input range of 64-940 whereas the two other channels
have an input range of 64-960. All three channels must have a DAC output range of 0-700mV, so normally the
analog voltage corresponding to 1 LSB would have to change to account for the different digital inputs. This might
cause matching errors. Therefore in the THS8200 the DAC LSB does not change; rather LSB conversion is done
by scaling the digital inputs to the DAC’s full input range. Furthermore the CSM output is 11-bit wide and sent to the
11-bit DAC’s. The extra bit of resolution resolves non-linearities introduced by the scaling process. The clipping
function can be switched off to allow for super-white/super-black excursions.
Digital Multiplexer (DIGMUX)
This multiplexer in front of the DACs can select between video signals at 1x or 2x pixelclock rate. It is also used to
switch in blanking/sync level data generated by the Display timing generator (DTG) block and test pattern data
(e.g. color bars, i2c-controlled DAC levels) or perform data insertion (CGMS) during vertical blanking.
Display Timing Generator (DTG)
The Display Timing Generator is responsible for the generation of the correct frame format including all sync,
equalization and serration pulses. In ‘master timing mode’, the DTG will be synchronized to external
synchronization inputs, either from the dedicated device terminals HS_IN, VS_IN, FID or synchronized to the
identifiers extracted from the input data stream, as selected by the DMAN mode.
When active data is not being passed to the DAC’s, i.e. during the horizontal/vertical blanking intervals, the DTG
generates the correct digital words for blank, sync levels and other ‘level excursions’, such as pre- & post-serration
pulses and equalization pulses.
Horizontal timings, as well as amplitudes of negative and positive sync, HDTV ‘broad’ pulses and SDTV pre- and
post-equalization and serration pulses, are all I2C-programmable to accommodate e.g. the generation of both
EIA.770-1 (10:4 video/sync ratio) as well EIA.770-2 (7:3 video/sync ratio) - compliant analog component video
outputs, and to support non-standard video timing formats.
In addition or as an alternative to the composite sync inserted on Green/Luma channel or all analog outputs, output
video timing can be carried via dedicated Hsyns/Vsync output signals as well. The position, duration and polarity of
Hsync and Vsync outputs are fully programmable in order to support e.g. the centering of the active video window
within the picture frame.
The DTG also controls the data multiplexer in the DIGMUX block. DIGMUX can be programmed to pass device
input data only on active video lines (inserting DTG-generated blanking level during blanking intervals).
Alternatively the DTG can pass device input data also during some VBI lines (ancillary data in the input stream will
be passed transparently on some VBI lines). Finally the device can also generate its own ancillary data and insert it
into the analog outputs according to the CGMS data format.
In THS8210, the DTG includes additionally the mechanism for Macrovision
TM copy protection insertion in the 525P
video format.
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