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參數資料
型號: TLV320ADC3001IYZHT
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 2-CH 16-BIT PROPRIETARY METHOD ADC, SERIAL ACCESS, PBGA16
封裝: GREEN, DSBGA-16
文件頁數: 37/81頁
文件大小: 836K
代理商: TLV320ADC3001IYZHT
SLAS548C
– OCTOBER 2008 – REVISED APRIL 2011
# ADC3101EVM Key Jumper Settings and Audio Connections:
# 1. Remove Jumpers W12 and W13
# 2. Insert Jumpers W4 and W5
# 3. Insert a 3.5mm stereo audio plug into J9 for
#
single-ended input IN1L(P) - left channel and
#
single-ended input IN1R(M) - right channel
################################################################
# 1. Define starting point:
#
(a) Power up appicable external hardware power supplies
#
(b) Set register page to 0
#
w 30 00 00
#
(c) Initiate SW Reset
#
w 30 01 01
#
# 2. Program Clock Settings
#
(a) Program PLL clock dividers P,J,D,R (if PLL is necessary)
#
# In EVM, the ADC3001 receives: MCLK = 11.2896 MHz,
# BCLK = 2.8224 MHz, WCLK = 44.1 kHz
#
# Sinve the sample rate is a multiple of the input MCLK then
# no PLL is needed thereby saving power. Use Default (Reset) Settings:
# Codec_clkin = MCLK, P=1, R=1, J=4, D=0000
w 30 04 00
w 30 05 11
w 30 06 04
w 30 07 00
w 30 08 00
#
(b) Power up PLL (if PLL is necessary) - Not Used in this Example
w 30 05 11
#
(c) Program and power up NADC
#
# NADC = 1, divider powered on
w 30 12 81
#
(d) Program and power up MADC
#
# MADC = 2, divider powered on
w 30 13 82
#
(e) Program OSR value
#
# AOSR = 128 (default)
w 30 14 80
#
(f) Program I2S word length as required (16, 20, 24, 32 bits)
#
# mode is i2s, wordlength is 16, slave mode (default)
w 30 1B 00
#
(g) Program the processing block to be used
#
# PRB_P1
w 30 3d 01
#
# 3. Program Analog Blocks
#
(a) Set register Page to 1
#
w 30 00 01
#
(b) Program MICBIAS if appicable
#
# Not used (default)
w 30 33 00
#
(c) Program MicPGA
#
# Left Analog PGA Seeting = 0dB
w 30 3b 00
#
42
Copyright
2008–2011, Texas Instruments Incorporated
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