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參數資料
| 型號： | TLV320DAC3120IRHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, 24-BIT DAC, PQCC32 |
| 封裝： | 5 X 5 MM, PLASTIC, QFN-32 |
| 文件頁數： | 28/110頁 |
| 文件大小： | 1230K |
| 代理商： | TLV320DAC3120IRHBT |
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LargestPositiveNumber:
=0.111 1111 1111 111
=0.999969482421875=1.0 – 1LSB
1
LargestNegativeNumber:
=1.0000 0000 0000 000
=0x8000= –1.0(bydefinition)
1
S.xxxx xxxx xxxx xxx
..
x
SignBit
2
Bit
–1
2
Bit
–4
2
Bit
–15
Fraction
Point
SLAS659 – NOVEMBER 2009
www.ti.com
5.6.1.3
DAC User-Programmable Filters
Depending on the selected processing block, different types and orders of digital filtering are available. Up
to six biquad sections are available for specific processing blocks.
The coefficients of the available filters are arranged as sequentially-indexed coefficients in two banks. If
adaptive filtering is chosen, the coefficient banks can be switched in real time.
When the DAC is running, the user-programmable filter coefficients are locked and cannot be accessed
for either read or write.
However, the TLV320DAC3120 offers an adaptive filter mode as well. Setting page 8 / register 1,
bit D2 = 1 turns on double buffering of the coefficients. In this mode, filter coefficients can be updated
through the host and activated without stopping and restarting the DAC. This enables advanced adaptive
filtering applications.
In the double-buffering scheme, all coefficients are stored in two buffers (buffers A and B). When the DAC
is running and adaptive filtering mode is turned on, setting page 8 / register 1, bit D0 = 1 switches the
coefficient buffers at the next start of a sampling period. This bit is set back to 0 after the switch occurs. At
the same time, page 8 / register 1, bit D1 toggles.
The flag in page 8 / register 1, bit D1 indicates which of the two buffers is actually in use.
Page 8 / register 1, bit D1 = 0: buffer A is in use by the DAC engine; bit D1 = 1: buffer B is in use.
While the device is running, coefficient updates are always made to the buffer not in use by the DAC,
regardless of the buffer to which the coefficients have been written.
Table 5-7. Adaptive-Mode Filter-Coefficient Buffer Switching
Coefficient Buffer in
DAC Powered Up
Page 8, Reg 1, Bit D1
I2C Writes to
Updates
Use
No
0
None
Page 8, Reg 2–3, buffer A
No
0
None
Page 12, Reg 2–3, buffer
Page 12, Reg 2–3, buffer B
B
Yes
0
Buffer A
Page 8, Reg 2–3, buffer A
Page 12, Reg 2–3, buffer B
Yes
0
Buffer A
Page 12, Reg 2–3, buffer
Page 12, Reg 2–3, buffer B
B
Yes
1
Buffer B
Page 8, Reg 2–3, buffer A
Yes
1
Buffer B
Page 12, Reg 2–3, buffer
Page 8, Reg 2–3, buffer A
B
The user-programmable coefficients for the DAC processing blocks are defined on pages 8 and 9 for
buffer A and pages 12 and 13 for buffer B.
The coefficients of these filters are each 16-bit, 2s-complement format, occupying two consecutive 8-bit
registers in the register space. Specifically, the filter coefficients are in 1.15 (one dot 15) format with a
range from –1.0 (0x8000) to 0.999969482421875 (0x7FFF) as shown in Figure 5-10.
Figure 5-10.
24
APPLICATION INFORMATION
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC3120
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| TLV320DAC3120IRHBT | 制造商:Texas Instruments 功能描述:D/A Converter (D-A) IC 制造商:Texas Instruments 功能描述:IC, DAC, 32BIT, 192KSPS, QFN-32 |
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| TLV320DAC3202BYZJR | 功能描述:音頻數/模轉換器 IC Lo Pwr Hi Fidelity I2S Input Headset IC RoHS:否 制造商:Texas Instruments 轉換器數量: 分辨率:16 bit 接口類型:I2S, UBS 轉換速率: 信噪比:98 dB 工作電源電壓:5 V DAC 輸出端數量:2 工作溫度范圍:- 25 C to + 85 C 電源電流:23 mA 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-32 封裝:Reel |
| TLV320DAC3202CYZJR | 功能描述:音頻放大器 Low Pwr Hi Fidelity I2S Input Headset IC RoHS:否 制造商:STMicroelectronics 產品:General Purpose Audio Amplifiers 輸出類型:Digital 輸出功率: THD + 噪聲: 工作電源電壓:3.3 V 電源電流: 最大功率耗散: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:TQFP-64 封裝:Reel |
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