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參數資料
| 型號： | TLV320DAC32IRHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | DAC |
| 英文描述： | SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數： | 11/69頁 |
| 文件大小： | 1242K |
| 代理商： | TLV320DAC32IRHBT |
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OVERVIEW
LDO OPERATION
LDO=ON
TLV320DAC32
IOVDD
D
IOVDD
3.3V
1 F
m
0.1 F
m
DVDD
IOVSS
LDO_SELECT
0.1 F
m
www.ti.com........................................................................................................................................ SLAS506B – NOVEMBER 2006 – REVISED DECEMBER 2008
The TLV320DAC32 is a highly flexible, low power stereo audio DAC with extensive feature integration, intended
for application in smartphones, PDAs, and portable computing, communication, and entertainment applications.
Available in a 5x5mm 32-lead QFN, the product integrates a host of features to reduce cost, board space, and
power consumption in space-constrained, battery powered portable applications.
The TLV320DAC32 consists of the following blocks:
Stereo audio multi-bit delta-sigma DAC (8 kHz – 96 kHz)
Programmable digital audio effects processing (3-D, bass, treble, mid-range, EQ, de-emphasis)
Two analog audio input pins
Four high-power audio output drivers (headphone/speaker drive capability)
Fully programmable PLL
Programmable voltage level for microphone biasing
Headphone/headset jack detection with interrupt
Selectable internal LDO regulator for systems that only have +3.3V power available.
The I2C interface supports both standard and fast communication modes.
The TLV320DAC32 includes a LDO voltage regulator that can be used in systems where a 1.8V power supply is
not available. In systems where the LDO is used, 3.3V power is applied to the device, and the internal LDO
regulator generates the 1.8V needed to operate the internal digital core. The LDO functionality is controlled by
the state of the LDO_SELECT pin (pin 5 in QFN package). To enable the LDO function, apply IOVDD to the
LDO_SELECT pin. To disable the LDO function, connect the LDO_SELECT pin to ground. The correct operation
of the device requires that the LDO_SELECT pin must be connected to either IOVDD or ground. When the LDO
is bypassed, the DVDD pin must be connected to a 1.8V power supply.
A small value ceramic capacitor should be connected between the DVDD pin and digital ground, even when the
internal LDO is used. This capacitor provides power supply decoupling for either power supply condition. See
A.
See tables for voltage range of IOVDD
Figure 21. LDO Function Operating
Copyright 2006–2008, Texas Instruments Incorporated
19
Product Folder Link(s): TLV320DAC32
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