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參數(shù)資料
型號(hào): TLV320DAC32IRHBT
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, DAC WITH PROGRAMMABLE PLL, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁(yè)數(shù): 15/69頁(yè)
文件大小: 1242K
代理商: TLV320DAC32IRHBT
DA(6)
DA(0)
RA(7)
RA(0)
D(7)
D(0)
Start
(M)
7-bit Device Address
(M)
Write
(M)
Slave
Ack
(S)
8-bit Register Address
(M)
Slave
Ack
(S)
8-bit Register Data
(M)
Stop
(M)
Slave
Ack
(S)
SDA
SCL
(M) => SDA Controlled by Master
(S) => SDA Controlled by Slave
DA(6)
DA(0)
RA(7)
RA(0)
Start
(M)
7-bit Device Address
(M)
Write
(M)
Slave
Ack
(S)
8-bit Register Address
(M)
Slave
Ack
(S)
SDA
SCL
DA(6)
DA(0)
7-bit Device Address
(M)
Read
(M)
Slave
Ack
(S)
D(7)
D(0)
8-bit Register Data
(S)
Stop
(M)
Master
No Ack
(M)
Repeat
Start
(M)
(M) => SDA Controlled by Master
(S) => SDA Controlled by Slave
SLAS506B – NOVEMBER 2006 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com
After the master issues a START condition, it sends a byte that indicates which slave device it wants to
communicate with. This byte is called the address byte. Each device on an I2C bus has a unique 7-bit address to
which it responds. (Slaves can also have 10-bit addresses; see the I2C specification for details.) The master
sends an address in the address byte, together with a bit that indicates whether it wishes to read from or write to
the slave device.
Every byte transmitted on the I2C bus, whether it is address or data, is acknowledged with an acknowledge bit.
When a master has finished sending a byte (eight data bits) to a slave, it stops driving SDA and waits for the
slave to acknowledge the byte. The slave acknowledges the byte by pulling SDA LOW. The master then sends a
clock pulse to clock the acknowledge bit. Similarly, when a master has finished reading a byte, it pulls SDA LOW
to acknowledge this to the slave. It then sends a clock pulse to clock the bit. (Remember that the master always
drives the clock line.)
A not-acknowledge is performed by simply leaving SDA HIGH during an acknowledge cycle. If a device is not
present on the bus, and the master attempts to address it, it will receive a not
acknowledge because no device
is present at that address to pull the line LOW.
When a master has finished communicating with a slave, it may issue a STOP condition. When a STOP
condition is issued, the bus becomes idle again. A master may also issue another START condition. When a
START condition is issued while the bus is active, it is called a repeated START condition.
The TLV320DAC32 also responds to and acknowledges a General Call, which consists of the master issuing a
command with a slave address byte of 00H.
Figure 24. I2C Write
Figure 25. I2C Read
In the case of an I2C register write, if the master does not issue a STOP condition, then the device enters
auto-increment mode. So in the next eight clocks, the data on SDA will be treated as data for the next
incremental register.
Similarly, in the case of an I2C register read, after the device has sent out the 8-bit data from the addressed
register, if the master issues a ACKNOWLEDGE, the slave will take over control of SDA bus and transmit for the
next 8 clocks the data of the next incremental register.
22
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320DAC32
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