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參數資料
| 型號： | TPS65200YFFR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, BGA36 |
| 封裝： | 2.80 X 2.60 MM, 0.40 MM PITCH, GREEN, DSBGA-36 |
| 文件頁數： | 32/59頁 |
| 文件大小： | 2424K |
| 代理商： | TPS65200YFFR |
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G 3
G2
A1
A0
R/nW
ACK
Start
G 1
G0
A2
S7
S6
S2
S1
S5
S4
S3
S0
ACK
D7
D6
D2
D1
D5
D4
D3
D0
ACK
Stop
Slave Address + R/nW
Sub Address
Data
START CONDITION
. . .
ACKNOWLEDGE
STOP CONDITION
SCL
SDA
1
2
3
4
5
6
7
8
9
. . .
SLVSA48 – APRIL 2010
www.ti.com
I
2C BUS OPERATION
The TPS65200 hosts a slave I2C interface that supports data rates up to 400 kbit/s and auto-increment
addressing and is compliant to I2C standard 3.0.
Figure 56. Subaddress in I2C Transmission
Start – Start Condition
ACK – Acknowledge
G(3:0) – Group ID: Address fixed at 1101
S(7:0) – Subaddress: defined per register map
A(2:0) – Device Address: Address fixed at 010
D(7:0) – Data; Data to be loaded into the device
R/nW – Read / not Write Select Bit
Stop – Stop Condition
The I2C bus is a communications link between a controller and a series of slave terminals. The link is established
using a two-wired bus consisting of a serial clock signal (SCL) and a serial data signal (SDA). The serial clock is
sourced from the controller in all cases where the serial data line is bi-directional for data communication
between the controller and the slave terminals. Each device has an open drain output to transmit data on the
serial data line. An external pull-up resistor must be placed on the serial data line to pull the drain output high
during data transmission.
Data transmission is initiated with a start bit from the controller as shown in Figure 57. The start condition is
recognized when the SDA line transitions from high to low during the high portion of the SCL signal. Upon
reception of a start bit, the device will receive serial data on the SDA input and check for valid address and
control information. If the appropriate group and address bits are set for the device, then the device will issue an
acknowledge pulse and prepare the receive subaddress data. Subaddress data is decoded and responded to as
per the Register Map section of this document. Data transmission is completed by either the reception of a stop
condition or the reception of the data word sent to the device. A stop condition is recognized as a low to high
transition of the SDA input during the high portion of the SCL signal. All other transitions of the SDA line must
occur during the low portion of the SCL signal. An acknowledge is issued after the reception of valid address,
sub-address and data words. The I2C interface will auto-sequence through register addresses, so that multiple
data words can be sent for a given I2C transmission.
Figure 57. I2C Start/Stop/Acknowledge Protocol
38
Copyright 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS65200
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