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參數資料
型號： 71M6543F-IGTR/F
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 模擬信號調理
英文描述： SPECIALTY ANALOG CIRCUIT, PQFP100
封裝： LEAD FREE, LQFP-100
文件頁數： 120/157頁
文件大小： 2178K
代理商： 71M6543F-IGTR/F
71M6543F/H and 71M6543G/GH Data Sheet
v1.2
2008–2011 Teridian Semiconductor Corporation
65
The LCD bias may be compensated for temperature using the LCD_DAC[4:0] field (I/O RAM 0x240D[4:0]).
The bias may be adjusted from 1.4 V below the 3.3 V supply (V3P3SYS in MSN mode and VBAT in BRN
and LCD modes). When the LCD_DAC[4:0] field is set to 000, the DAC is bypassed and powered
down. This setting can be used to reduce current in LCD mode.
Figure 17: LCD Waveforms
SEG46 through SEG50 cannot be configured as DIO pins. Display data for these pins are written to I/O
RAM registers LCD_SEG46[5:0] through LCD_SEG50[5:0] (see Table 54).
Table 54: LCD Data Registers for SEGDIO46 to SEGDIO55
SEGDIO
46
47
48
49
50
51
52
53
54
55
Pin #
93
92
58
57
56
53
52
51
47
46
Configuration:
Always LCD pins
SEG Data
Register
L
C
D
_
SE
GDIO4
6
[5
:0
]
(I
/O
R
A
M
0x
2
43E
[5
:0
]
L
C
D
_
SE
GDIO4
7
[5
:0
]
(I
/O
R
A
M
0x
2
43F
[5
:0
])
L
C
D
_
SE
GDIO4
8
[5
:0
]
(I/
O
R
A
M
0
x24
40[
5:
0]
L
C
D
_
SE
GDIO4
9
[5
:0
]
(I/
O
R
A
M
0
x24
41[
5:
0]
)
L
C
D
_
SE
GDIO5
0
[5
:0
]
(I/
O
R
A
M
0
x24
42[
5:
0]
)
L
C
D
_
SE
GDIO5
1
[5
:0
]
(I/
O
R
A
M
0
x24
43[
5:
0]
)
L
C
D
_
SE
GDIO5
2
[5
:0
]
(I/
O
R
A
M
0
x24
44[
5:
0]
)
L
C
D
_
SE
GDIO5
3
[5
:0
]
(I/
O
R
A
M
0
x24
45[
5:
0]
)
L
C
D
_
SE
GDIO5
4
[5
:0
]
(I/
O
R
A
M
0
x24
46[
5:
0]
)
L
C
D
_
SE
GDIO5
5
[5
:0
]
(I/
O
R
A
M
0
x24
47[
5:
0]
)
The LCD_MAP[47:46] (I/O RAM 0x2406[7:6]) bits are used to determine whether SEG46 and SEG47 are
SEG pins or their alternate function (see pins 93 and 92 in Figure 43). If the LCD_MAP[47:46] bits are 1,
then the pins are configured as SEG pins. If the LCD_MAP[47:46] bits are 0, then the pins are configured
as their alternate functions (TMUX2OUT and TMUXOUT, respectively).
STATIC (LCD_MODE=100)
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
(1/2)
1/2 BIAS, 2 STATES (LCD_MODE = 010 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
(1/2)
0
1
1/2 BIAS, 3 STATES (LCD_MODE = 011 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
(1/2)
0
1
2
1/3 BIAS, 3 STATES (LCD_MODE = 011 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
(2/3)
0
1
2
(1/3)
1/3 BIAS, 4 STATES (LCD_MODE = 000 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
0
1
2
1/3 BIAS, 6 STATES (LCD_MODE = 110 )
COM0
COM1
COM2
COM3
COM4
COM5
SEG_ON
SEG_OFF
0
1
2
3
4
5
T
相關PDF資料
PDF描述
71M6543H-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543G-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543GH-IGTR/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543GH-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
71M6543G-IGT/F SPECIALTY ANALOG CIRCUIT, PQFP100
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