
AD7722
–15–
REV. 0
Even though the voltage on the input sampling capacitors may
not have enough time to settle to the accuracy indicated by the
resolution of the AD7722, as long as the sampling capacitor
charging follows the exponential curve of RC circuits, only the
gain accuracy suffers if the input capacitor is switched away
too early.
An alternative circuit configuration for driving the differential
inputs to the AD7722 is shown in Figure 30.
R
100
C
2.7nF
AD7722
VIN(+)
VIN(–)
C
2.7nF
C
2.7nF
R
100
Figure 30. Differential Input with Antialiasing
A capacitor between the two input pins sources or sinks charge
to allow most of the charge that is needed by one input to be
effectively supplied by the other input. This minimizes undesir-
able charge transfer from the analog inputs to and from ground.
The series resistor isolates the operational amplifier from the
current spikes created during the sampling process and provides
a pole for antialiasing. The –3 dB cutoff frequency
(f
3 dB
) of the antialias filter is given by Equation 1, and the
attenuation of the filter is given by Equation 2.
f
3
dB
=
1
6
π
RC
(1)
Attenuation
=
20log 1/ 1
+
f
f
3
dB
2
(2)
The choice of the filter cutoff frequency will depend on the
amount of roll-off that is acceptable in the pass band of the
digital filter and the required attenuation at the first image
frequency. For example, when operating the AD7722 with a
12.5 MHz clock; with the typical values of R and C of 100
and
2.7 nF shown in Figure 30, the –3 dB cutoff frequency (f
3 dB
)
creates less than 1 dB of in band (90.625 kHz) roll-off and
provides about 36 dB attenuation at the first image frequency.
The capacitors used for the input antialiasing circuit must have
low dielectric absorption to avoid distortion. Film capacitors
such as Polypropylene, Polystyrene or Polycarbonate are
suitable. If ceramic capacitors are used, they must have NP0
dielectric.
Applying the Reference
The reference circuitry used in the AD7722 includes an on-chip
2.5 V band gap reference and a reference buffer circuit. The
block diagram of the reference circuit is shown in Figure 31.
The internal reference voltage is connected to REF1 through a
3 k
resistor and is internally buffered to drive the analog
modulator’s switched cap DAC (REF2). When using the
internal reference, connect 100 nF between REF1 and AGND.
If the internal reference is required to bias external circuits, use
an external precision op amp to buffer REF1.
24
3k
AD7722
REFERENCE
BUFFER
22
1V
2.5V
REFERENCE
SWITCHED-CAP
DAC REF
REF1
REF2
COMPARATOR
100nF
Figure 31. Reference Circuit Block Diagram
The AD7722 can operate with its internal reference or an
external reference can be applied in two ways. An external
reference can be connected to REF1, overdriving the internal
reference. However, there will be an error introduced due to
the offset of the internal buffer amplifier. For lowest system
gain errors when using an external reference, REF1 is grounded
(disabling the internal buffer) and the external reference is
connected to REF2.
In all cases, since the REF2 voltage connects to the analog
modulator, a 100 nF capacitor must connect directly from
REF2 to AGND. The external capacitor provides the charge
required for the dynamic load presented at the REF2 pin
(Figure 32).
Φ
A
Φ
B
Φ
B
24
4pF
Φ
A
Φ
B
Φ
A
Φ
B
CLKIN
REF2
AD7722
Φ
A
4pF
SWITCHED-CAP
DAC REF
100nF
Figure 32. REF2 Equivalent Input Circuit
The AD780 is ideal to use as an external reference with the
AD7722. Figure 33 shows a suggested connection diagram.
AD780
1
2
3
4
8
7
6
5
NC
+V
IN
TEMP
GND
O/P
SELECT
NC
V
OUT
TRIM
22nF
1μF
24
REF2
AD7722
22μF
100nF
22
REF1
+5V
Figure 33. External Reference Circuit Connection