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| 型號(hào)： | AD7851AR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit 333 kSPS Serial A/D Converter |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | MS-013AD, SOIC-24 |
| 文件頁(yè)數(shù)： | 7/36頁(yè) |
| 文件大小： | 435K |
| 代理商： | AD7851AR |
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–7–
REV. A
AD7851
T E RMINOLOGY
Integral Nonlinearity
T his is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. T he end-
points of the transfer function are zero scale, a point 1/2 LSB
below the first code transition, and full scale, a point 1/2 LSB
above the last code transition.
Differential Nonlinearity
T his is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
T otal Unadjusted E rror
T his is the deviation of the actual code from the ideal code tak-
ing all errors into account (
Gain, Offset, Integral Nonlinearity,
and other errors
) at any point along the transfer function.
Unipolar Offset E rror
T his is the deviation of the first code transition (00 . . . 000 to
00 . . . 001) from the ideal AIN(+) voltage (AIN(–) + 1/2 LSB)
when operating in the unipolar mode.
Positive Full-Scale E rror
T his applies to the unipolar and bipolar modes and is the devia-
tion of the last code transition from the ideal AIN(+) voltage
(AIN(–) + Full Scale – 1.5 LSB) after the offset error has been
adjusted out.
Negative Full-Scale E rror
T his applies to the bipolar mode only and is the deviation of the
first code transition (00 . . . 000 to 00 . . . 001) from the ideal
AIN(+) voltage (AIN(–) – V
REF
/2 + 0.5 LSB).
Bipolar Zero E rror
T his is the deviation of the midscale transition (all 0s to all 1s)
from the ideal AIN(+) voltage (AIN(–) – 1/2 LSB).
T rack/Hold Acquisition T ime
T he track/hold amplifier returns into track mode and the end of
conversion. T rack/Hold acquisition time is the time required for
the output of the track/hold amplifier to reach its final value,
within
±
1/2 LSB, after the end of conversion.
Signal to (Noise + Distortion) Ratio
T his is the measured ratio of signal to (noise + distortion) at the
output of the A/D converter. T he signal is the rms amplitude of
the fundamental. Noise is the sum of all nonfundamental sig-
nals up to half the sampling frequency (f
S
/2), excluding dc. T he
ratio is dependent on the number of quantization levels in the
digitization process; the more levels, the smaller the quantiza-
tion noise. T he theoretical signal to (noise + distortion) ratio for
an ideal N-bit converter with a sine wave input is given by:
Signal to (Noise + Distortion) = (
6.02
N +
1.76
) dB
T hus for a 14-bit converter, this is 86 dB.
T otal Harmonic Distortion
T otal harmonic distortion (T HD) is the ratio of the rms sum of
harmonics to the fundamental. For the AD7851, it is defined as:
THD
(
dB
)
=
20log
V
2
2
+
V
3
2
+
V
4
2
+
V
5
2
+
V
6
2
V
1
where
V
1
is the rms amplitude of the fundamental and
V
2
,
V
3
,
V
4
,
V
5
and
V
6
are the rms amplitudes of the second through the
sixth harmonics.
Peak Harmonic or Spurious Noise
Peak harmonic or spurious noise is defined as the ratio of the
rms value of the next largest component in the ADC output
spectrum (up to f
S
/2 and excluding dc) to the rms value of the
fundamental. Normally, the value of this specification is deter-
mined by the largest harmonic in the spectrum, but for parts
where the harmonics are buried in the noise floor, it will be a
noise peak.
Intermodulation Distortion
With inputs consisting of sine waves at two frequencies, fa and
fb, any active device with nonlinearities will create distortion
products at sum and difference frequencies of mfa
±
nfb where
m, n = 0, 1, 2, 3, etc. Intermodulation distortion terms are
those for which neither m nor n are equal to zero. For example,
the second order terms include (fa + fb) and (fa – fb), while the
third order terms include (2fa + fb), (2fa – fb), (fa + 2fb) and
(fa – 2fb).
T esting is performed using the CCIF standard where two input
frequencies near the top end of the input bandwidth are used. In
this case, the second order terms are usually distanced in fre-
quency from the original sine waves while the third order terms
are usually at a frequency close to the input frequencies. As a
result, the second and third order terms are specified separately.
T he calculation of the intermodulation distortion is as per the
T HD specification where it is the ratio of the rms sum of the
individual distortion products to the rms amplitude of the sum
of the fundamentals expressed in dBs.
Power Supply Rejection Ratio
Power Supply Rejection Ratio (PSRR) is defined as the ratio of
the power in ADC output at frequency f to the power of the full-
scale sine wave applied to the supply voltage (V
DD
). T he units
are in LSB, %of FS per % of supply voltage, or expressed loga-
rithmically, in dB (PSRR (dB) = 10 log(Pf/Pfs)).
Full Power Bandwidth
T he Full Power Bandwidth (FPBW) is that frequency at which
the amplitude of the reconstructed (using FFT s) fundamental
(neglecting harmonics and SNR) is reduced by 3 dB for a full-
scale input.
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| AD7851AR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 333ksps 14-bit Serial 24-Pin SOIC W T/R |
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| AD7851ARSZ | 功能描述:IC ADC 14BIT SRL 333KSPS 24SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7851ARSZ-REEL | 功能描述:IC ADC 14BIT SRL 333KSPS 24SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
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