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參數資料
型號: AD7851KR
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 14-Bit 333 kSPS Serial A/D Converter
中文描述: 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24
封裝: MS-013AD, SOIC-24
文件頁數: 27/36頁
文件大小: 435K
代理商: AD7851KR
–27–
REV. A
AD7851
extra bit on the DOUT pin.
If the user has control of the
CONVST
pin but does not want to
exercise it for every conversion, the control register may be used
to start a conversion. Setting the CONVST bit in the control
register to 1 starts a conversion. If the user does not have con-
trol of the
CONVST
pin, a conversion should not initiated by
writing to the control register. T he reason for this is that the
user may get “locked out” and not be able to perform any fur-
ther write/read operations. When a conversion is started by writ-
ing to the control register, the
SYNC
goes low and read/write
operations take place while the conversion is in progress. How-
ever, once the conversion is complete, there is no way of writing
to the part unless the
CONVST
pin is exercised. T he
CONVST
signal triggers the
SYNC
signal low which allows read/write op-
erations to take place.
SYNC
must be low to perform read/write
operations. T he
SYNC
is triggered low by the
CONVST
signal
rising edge or setting the CONVST bit in the control register to
1. T herefore if there is not full control of the
CONVST
pin the
user may end up getting “locked out.”
SERIAL
INTERFACE
MODE
POWER-ON, APPLY CLKIN SIGNAL,
WAIT 150ms FOR AUTOMATIC CALIBRATION
DIN CONNECTED TO DGND
NO
YES
START
WAIT FOR BUSY SIGNAL
TO GO LOW
PULSE
CONVST
PIN
READ
DATA
DURING
CONVERSION
WAIT APPROXIMATELY 200ns
AFTER
CONVST
RISING EDGE
APPLY
SYNC
(IF REQUIRED), SCLK AND READ
CONVERSION RESULT ON DOUT PIN
PULSE
CONVST
PIN
SYNC
AUTOMATICALLY GOES LOW
AFTER
CONVST
RISING EDGE
SCLK AUTOMATICALLY ACTIVE, READ
CONVERSION RESULT ON DOUT PIN
4, 5
2, 3
Figure 40. Flowchart for Setting Up and Reading from the AD7851
CONFIGURING T HE AD7851
AD7851 as a Read-Only ADC
T he AD7851 contains fourteen on-chip registers which can be
accessed via the serial interface. In the majority of applications it
will not be necessary to access all of these registers. Figure 40
outlines a flowchart of the sequence which is used to configure
the AD7851 as a Read-Only ADC. In this case there is no writ-
ing to the on-chip registers and only the conversion result data is
read from the part. Interface Mode 1 cannot be used in this case
as it is necessary to write to the control register to set Interface
Mode 1. Here the CLK IN signal is applied directly after power-
on, the CLK IN signal must be present to allow the part to per-
form a calibration. T his automatic calibration will be completed
approximately 150 ms after power-on.
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相關代理商/技術參數
參數描述
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