- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373920 > AD7851KR (ANALOG DEVICES INC) 14-Bit 333 kSPS Serial A/D Converter PDF資料下載
參數(shù)資料
| 型號： | AD7851KR |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 14-Bit 333 kSPS Serial A/D Converter |
| 中文描述： | 1-CH 14-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO24 |
| 封裝： | MS-013AD, SOIC-24 |
| 文件頁數(shù)： | 9/36頁 |
| 文件大?。?/td> | 435K |
| 代理商： | AD7851KR |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
–9–
REV. A
AD7851
AD7851 ON-CHIP RE GIST E RS
T he AD7851 powers up with a set of default conditions, and the user need not ever write to the device. In this case the AD7851 will
operate as a Read-Only ADC. T he AD7851 still retains the flexibility for performing a full power-down, and a full self-calibration.
Note that the DIN pin should be tied to DGND for operating the AD7851 as a Read-Only ADC.
Extra features and flexibility such as performing different power-down options, different types of calibrations including system cali-
bration, and software conversion start can be selected by writing to the part.
T he AD7851 contains a
Control register
,
ADC output data register
,
Status register
,
T est register
and
10 Calibration regis-
ters
. T he control register is write-only, the ADC output data register and the status register are read-only, and the test and calibra-
tion registers are both read/write registers. T he test register is used for testing the part and should not be written to.
Addressing the On-Chip Registers
Writing
A write operation to the AD7851 consists of 16 bits. T he two MSBs, ADDR0 and ADDR1, are decoded to determine which register
is addressed, and the subsequent 14 bits of data are written to the addressed register. It is not until all 16 bits are written that the
data is latched into the addressed register. T able I shows the decoding of the address bits, while Figure 4 shows the overall write reg-
ister hierarchy.
T able I. Write Register Addressing
ADDR1
ADDR0
Comment
0
0
1
0
1
0
T his combination does not address any register so the subsequent 14 data bits are ignored.
T his combination addresses the
TE ST RE GISTE R
. T he subsequent 14 data bits are written to the test register.
T his combination addresses the
CALIBRAT ION RE GIST E RS
. T he subsequent 14 data bits are written
to the selected calibration register.
T his combination addresses the
CONT ROL RE GIST E R
. T he subsequent 14 data bits are written to the
control register.
1
1
Reading
T o read from the various registers the user must first write to Bits 6 and 7 in the Control Register, RDSLT 0 and RDSLT 1. T hese
bits are decoded to determine which register is addressed during a read operation. T able II shows the decoding of the read address
bits while Figure 5 shows the overall read register hierarchy. T he power-up status of these bits is 00 so that the default read will be
from the ADC output data register.
Once the read selection bits are set in the control register all subsequent read operations that follow will be from the selected register
until the read selection bits are changed in the control register.
T able II. Read Register Addressing
RDSLT 1
RDSLT 0
Comment
0
0
All successive read operations will be from
ADC OUT PUT DAT A RE GIST E R
. T his is the power-up de-
fault setting. T here will always be four leading zeros when reading from the ADC output data register.
All successive read operations will be from
T E ST RE GIST E R
.
All successive read operations will be from
CALIBRAT ION RE GIST E RS
.
All successive read operations will be from
ST AT US RE GIST E R
.
0
1
1
1
0
1
ADDR1, ADDR0
DECODE
TEST
REGISTER
CONTROL
REGISTER
GAIN (1)
OFFSET (1)
DAC (8)
GAIN (1)
OFFSET (1)
OFFSET (1)
GAIN (1)
01
10
11
00
01
10
11
CALSLT1, CALSLT0
DECODE
CALIBRATION
REGISTERS
Figure 4. Write Register Hierarchy/Address Decoding
RDSLT1, RDSLT0
DECODE
TEST
REGISTER
CALIBRATION
REGISTERS
STATUS
REGISTER
GAIN (1)
OFFSET (1)
DAC (8)
GAIN (1)
OFFSET (1)
OFFSET (1)
GAIN (1)
01
10
11
00
01
10
11
CALSLT1, CALSLT0
DECODE
ADC OUTPUT
DATA REGISTER
00
Figure 5. Read Register Hierarchy/Address Decoding
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD7853LARS | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
| AD7853L* | Single Supply V.35 Transceiver; Package: SO; No of Pins: 28; Temperature Range: -40°C to +85°C |
| AD7853L | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs(單電源,200kSPS 12位采樣A/D轉(zhuǎn)換器) |
| AD7853 | 3 V to 5 V Single Supply, 200 KSPS 12-Bit Sampling ADCs(單電源,200kSPS 12位采樣A/D轉(zhuǎn)換器) |
| AD7853AN | 3 V to 5 V Single Supply, 200 kSPS 12-Bit Sampling ADCs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7851KR-REEL | 制造商:Analog Devices 功能描述: |
| AD7851KRZ | 功能描述:IC ADC 14BIT SRL 333KSPS 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7851KRZ3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit 333 kSPS Serial A/D Converter |
| AD7851KRZ-REEL | 功能描述:IC ADC 14BIT SRL 333KSPS 24-SOIC RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7851KRZ-REEL3 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit 333 kSPS Serial A/D Converter |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。