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參數資料
| 型號： | AD7854L |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit Sampling ADC(單電源,200kSPS 12位采樣A/D轉換器) |
| 中文描述： | 12位采樣ADC（單電源，速度高達200ksps的12位采樣的A / D轉換器） |
| 文件頁數： | 11/28頁 |
| 文件大小： | 268K |
| 代理商： | AD7854L |
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AD7854/AD7854L
REV. 0
–11–
CALIBRAT ION RE GIST E RS
T he AD7854/AD7854L has 10 calibration registers in all, 8 for the DAC, 1 for offset and 1 for gain. Data can be written to or read
from all 10 calibration registers. In self- and system calibration, the part automatically modifies the calibration registers; only if the
user needs to modify the calibration registers should an attempt be made to read from and write to the calibration registers.
Addressing the Calibration Registers
T he calibration selection bits in the control register CALSLT 1 and CALSLT 0 determine which of the calibration registers are ad-
dressed (See T able IV). T he addressing applies to both the read and write operations for the calibration registers. T he user should
not attempt to read from and write to the calibration registers at the same time.
T able IV. Calibration Register Addressing
CALSLT 1 CALSLT 0
Comment
0
0
1
1
0
1
0
1
T his combination addresses the
Gain (1)
,
Offset (1)
and
DAC Registers (8)
. T en registers in total.
T his combination addresses the
Gain (1)
and
Offset (1)
Registers. T wo registers in total.
T his combination addresses the
Offset Register
. One register in total.
T his combination addresses the
Gain Register
. One register in total.
Writing to/Reading from the Calibration Registers
When writing to the calibration registers a write to the control
register is required to set the CALSLT 0 and CALSLT 1 bits.
When reading from the calibration registers a write to the con-
trol register is required to set the CALSLT 0 and CALSLT 1 bits
and also to set the RDSLT 1 and RDSLT 0 bits to 10 (this ad-
dresses the calibration registers for reading). T he calibration
register pointer is reset on writing to the control register setting
the CALSLT 1 and CALSLT 0 bits, or upon completion of all
the calibration register write/read operations. When reset it
points to the first calibration register in the selected write/read
sequence. T he calibration register pointer points to the gain
calibration register upon reset in all but one case, this case being
where the offset calibration register is selected on its own
(CALSLT 1 = 1, CALSLT 0 = 0). Where more than one cali-
bration register is being accessed, the calibration register pointer
is automatically incremented after each full calibration register
write/read operation. T he calibration register address pointer is
incremented after the high byte read or write operation in byte
mode. T herefore when reading from or writing to the calibra-
tion registers, the low byte transfer must be carried out first, i.e.,
HBEN is at logic zero. T he order in which the 10 calibration
registers are arranged is shown in Figure 5. Read/Write opera-
tions may be aborted at any time before all the calibration regis-
ters have been accessed, and the next control register write
operation resets the calibration register pointer. T he flowchart
in Figure 6 shows the sequence for writing to the calibration
registers. Figure 7 shows the sequence for reading from the cali-
bration registers.
CALIBRATION REGISTERS
GAIN REGISTER
OFFSET REGISTER
DAC 1ST MSB REGISTER
(1)
(2)
(3)
DAC 8TH MSB REGISTER (10)
CAL REGISTER
ADDRESS POINTER
CALIBRATION REGISTER ADDRESS POINTER POSITION IS
DETERMINED BY THE NUMBER OF CALIBRATION REGISTERS
ADDRESSED AND THE NUMBER OF READ/WRITE OPERATIONS.
Figure 5. Calibration Register Arrangement
When reading from the calibration registers there are always two
leading zeros for each of the registers.
WRITE TO CONTROL REGISTER SETTING STCAL = 0
AND CALSLT1, CALSLT0 = 00, 01, 10, 11
START
CAL REGISTER POINTER IS
AUTOMATICALLY RESET
WRITE TO CAL REGISTER
(ADDR1 = 1, ADDR0 = 0)
CAL REGISTER POINTER IS
AUTOMATICALLY INCREMENTED
LAST
REGISTER
WRITE
OPERATION
OR
ABORT
FINISHED
NO
YES
Figure 6. Flowchart for Writing to the Calibration Registers
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD7854LAQ | 制造商:Rochester Electronics LLC 功能描述:12 BIT SINGLE CHANNEL PARALLEL ADC I.C. - Bulk |
| AD7854LAR | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Parallel 28-Pin SOIC W 制造商:Rochester Electronics LLC 功能描述:12-BIT SINGLE CHANNEL PARALLEL ADC I.C. - Bulk |
| AD7854LAR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 100ksps 12-bit Parallel 28-Pin SOIC W T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 100KSPS 12-BIT PARALLEL 28SOIC W - Tape and Reel |
| AD7854LARS | 功能描述:IC ADC 12BIT PARALLEL LP 28-SSOP RoHS:否 類別:集成電路 (IC) >> 數據采集 - 模數轉換器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數:12 采樣率（每秒）:3M 數據接口:- 轉換器數目:- 功率耗散（最大）:- 電壓電源:- 工作溫度:- 安裝類型:表面貼裝 封裝/外殼:SOT-23-6 供應商設備封裝:SOT-23-6 包裝:帶卷 (TR) 輸入數目和類型:- |
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