
Parameter
A Version
1
B Version
1
S Version
1
Units
T est Conditions/Comments
DYNAMIC PERFORMANCE
Signal to Noise + Distortion Ratio
3
(SNR)
70
71
70
dB min
T ypically SNR is 72 dB
V
IN
= 10 kHz Sine Wave, f
SAMPLE
= 200 kHz
(100 kHz)
V
IN
= 10 kHz Sine Wave, f
SAMPLE
= 200 kHz
(100 kHz)
V
IN
= 10 kHz Sine Wave, f
SAMPLE
= 200 kHz
(100 kHz)
T otal Harmonic Distortion (T HD)
–78
–78
–78
dB max
Peak Harmonic or Spurious Noise
–78
–78
–78
dB max
Intermodulation Distortion (IMD)
Second Order T erms
–78
–78
–78
dB typ
fa = 9.983 kHz, fb = 10.05 kHz, f
SAMPLE
= 200 kHz
(100 kHz)
fa = 9.983 kHz, fb = 10.05 kHz, f
SAMPLE
= 200 kHz
(100 kHz)
T hird Order T erms
–78
–78
–78
dB typ
DC ACCURACY
Resolution
Integral Nonlinearity
Differential Nonlinearity
Unipolar Offset Error
12
±
1
±
1
±
3
±
2
±
4
±
2
±
4
±
2
±
4
±
2
±
4
12
±
0.5
±
1
±
3
±
2
±
4
±
2
±
4
±
2
±
4
±
2
±
4
12
±
1
±
1
±
4
±
2
±
4
±
2
±
5
±
2
±
5
±
2
±
5
Bits
LSB max
LSB max
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB typ
LSB max
LSB typ
LSB max
5 V Reference V
DD
= 5 V
Guaranteed No Missed Codes to 12 Bits
Unipolar Gain Error
Bipolar Positive Full-Scale Error
Negative Full-Scale Error
Bipolar Zero Error
ANALOG INPUT
Input Voltage Ranges
0 to V
REF
0 to V
REF
0 to V
REF
Volts
i.e., AIN(+) – AIN(–) = 0 to V
REF
, AIN(–) can be
biased up but AIN(+) cannot go below AIN(–).
i.e., AIN(+) – AIN(–) = –V
REF
/2 to +V
REF
/2, AIN(–)
should be biased to +V
REF
/2 and AIN(+) can go below
AIN(–) but cannot go below 0 V.
±
V
REF
/2
±
V
REF
/2
±
V
REF
/2
Volts
Leakage Current
Input Capacitance
±
1
20
±
1
20
±
1
20
μ
A max
pF typ
REFERENCE INPUT /OUT PUT
REF
IN
Input Voltage Range
Input Impedance
REF
OUT
Output Voltage
REF
OUT
T empco
2.3/V
DD
150
2.3/2.7
20
2.3/V
DD
150
2.3/2.7
20
2.3/V
DD
150
2.3/2.7
20
V min/max
k
typ
V min/max
ppm/
°
C typ
Functional from 1.2 V
LOGIC INPUT S
Input High Voltage, V
INH
3
2.1
0.4
0.6
±
10
10
3
2.1
0.4
0.6
±
10
10
3
2.1
0.4
0.6
±
10
10
V min
V min
V max
V max
μ
A max
pF max
AV
DD
= DV
DD
= 4.5 V to 5.5 V
AV
DD
= DV
DD
= 3.0 V to 3.6 V
AV
DD
= DV
DD
= 4.5 V to 5.5 V
AV
DD
= DV
DD
= 3.0 V to 3.6 V
T ypically 10 nA, V
IN
= 0 V or V
DD
Input Low Voltage, V
INL
Input Current, I
IN
Input Capacitance, C
IN4
LOGIC OUT PUT S
Output High Voltage, V
OH
I
SOURCE
= 200
μ
A
AV
DD
= DV
DD
= 4.5 V to 5.5 V
AV
DD
= DV
DD
= 3.0 V to 3.6 V
4
2.4
4
2.4
4
2.4
V min
V min
Output Low Voltage, V
OL
Floating-State Leakage Current
Floating-State Output Capacitance
4
Output Coding
0.4
±
10
10
0.4
±
10
10
0.4
±
10
10
V max
μ
A max
pF max
I
SINK
= 1.6 mA
Straight (Natural) Binary
T wos Complement
Unipolar Input Range
Bipolar Input Range
CONVERSION RAT E
Conversion T ime
T rack/Hold Acquisition T ime
t
CLK IN
×
18
(L Versions Only)
(L Versions Only)
4.5 (9)
0.5 (1)
4.5 (9)
0.5 (1)
4.5 (9)
0.5 (1)
μ
s max
μ
s min
AD7854/AD7854L–SPECIFICATIONS
1, 2
External Reference, f
CLKIN
= 4 MHz (1.8MHz for L Version); f
SAMPLE
= 200kHz (AD7854), 100kHz (AD7854L); T
A
= T
MN
to T
MAX
, unless otherwse
noted.) Specifications in () apply to the AD7854L.
(AV
DD
= DV
DD
= +3.0V to +5.5V, REF
IN
/REF
OUT
= 2.5 V
–2–
REV. 0