- 您現在的位置：買賣IC網 > PDF目錄373969 > AD9849KST (ANALOG DEVICES INC) CCD Signal Processors with Integrated Timing Driver PDF資料下載
參數資料
| 型號： | AD9849KST |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費家電 |
| 英文描述： | CCD Signal Processors with Integrated Timing Driver |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | PLASTIC, LQFP-48 |
| 文件頁數： | 23/36頁 |
| 文件大?。?/td> | 347K |
| 代理商： | AD9849KST |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
REV. 0
AD9848/AD9849
–23–
Horizontal Sequence Control
The AD9848/AD9849 uses Sequence Change Positions (SCP)
and Sequence Pointers (SPTR) to organize the individual horizon-
tal sequences. Up to four SCPs are available to divide the
readout into four separate regions, as shown in Figure 12.
The SCP 0 is always hard-coded to line 0, and SCP1–3 are regis-
ter programmable. During each region bounded by the SCP, the
SPTR registers designate which sequence is used by each signal.
HD
HBLK
. . .
THE POLARITY OF H1 DURING BLANKING IS PROGRAMMABLE (H2 IS OPPOSITE POLARITY OF H1)
. . .
. . .
H1/H3
H1/H3
H2/H4
. . .
Figure 11. HBLK Masking Control
NOTE
UP TO FOUR INDIVIDUAL HORIZONTAL CLAMP AND BLANKING REGIONS MAY BE
PROGRAMMED WITHIN A SINGLE FIELD, USING THE SEQUENCE CHANGE POSITIONS.
SEQUENCE CHANGE OF POSITION #1
SEQUENCE CHANGE OF POSITION #2
SEQUENCE CHANGE OF POSITION #3
SINGLE FIELD (1 VD INTERVAL)
CLAMP AND PBLK SEQUENCE REGION 0
SEQUENCE CHANGE OF POSITION #0
(V-COUNTER = 0)
CLAMP AND PBLK SEQUENCE REGION 3
CLAMP AND PBLK SEQUENCE REGION 2
CLAMP AND PBLK SEQUENCE REGION 1
Figure 12. Clamp and Blanking Sequence Flexibility
Table VI. Horizontal Sequence Control Parameters for CLPOB, CLPDM, PBLK, and HBLK
Register Name
Length
Range
Description
SCP1–SCP3
SPTR0–SPTR3
12b
2b
0–4095 Line Number
0–3 Sequence Number
CLAMP/BLANK SCP to Define Horizontal Regions 0–3
Sequence Pointer for Horizontal Regions 0–3
CLPOB, CLPDM, PBLK, and HBLK each have a separate
set of SCP. For example, CLPOBSCP1 will define Region 0
for CLPOB, and in that region any of the four individual
CLPOB sequences may be selected with the CLPOBSPTR
registers. The next SCP defines a new region, and in that
region each signal can be assigned to a different individual
sequence. The Sequence Control Registers are summarized
in Table VI.
相關PDF資料 |
PDF描述 |
|---|---|
| AD9851 | CMOS 180 MHz DDS/DAC Synthesizer |
| AD9852 | CMOS 300MHz Complete-DDS Synthesizer |
| AD9853 | Programmable Digital QPSK/16-QAM Modulator(可編程數字的四相移鍵控/16-正交幅度調制的調節器) |
| AD9854 | CMOS 300MHz Quadrature Complete-DDS |
| AD9858TLPCB | 1 GSPS Direct Digital Synthesizer |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9849KSTRL | 制造商:Analog Devices 功能描述:12 BIT 25 MSPS 5V AFE & T - Tape and Reel |
| AD9850 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS, 125 MHz Complete DDS Synthesizer |
| AD9850/CGPCB | 制造商:Analog Devices 功能描述:NCO/DDS, CMOS, 125MHZ COMPLETE DDS SYNTHESIZER - Bulk |
| AD9850/FSPCB | 制造商:Analog Devices 功能描述:EVALUATION BOARD FOR NCO/DDS, CMOS, 125MHZ COMPLETE DDS SYNTHESIZER 制造商:Analog Devices 功能描述:NCO/DDS, CMOS, 125MHZ COMPLETE DDS SYNTHESIZER - Bulk |
| AD9850BRS | 功能描述:IC DDS DAC W/COMP 125MHZ 28-SSOP RoHS:否 類別:集成電路 (IC) >> 接口 - 直接數字合成 (DDS) 系列:- 產品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調節字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
發布緊急采購，3分鐘左右您將得到回復。