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參數(shù)資料
| 型號： | AD9858BSV |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數(shù)字信號處理外設(shè) |
| 英文描述： | 1 GSPS Direct Digital Synthesizer |
| 中文描述： | DSP-NUM CONTROLLED OSCILLATOR, PQFP100 |
| 封裝： | PLASTIC, MS-026AED-HD, TQFP-100 |
| 文件頁數(shù)： | 18/32頁 |
| 文件大小： | 1412K |
| 代理商： | AD9858BSV |
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AD9858
phase value before the change, but at the new tuning word’s
phase increment value (FTW). (Note that this is not the same as
phase-coherent over frequency changes; see Figure 31.)
Rev. A | Page 18 of 32
The maximum usable frequency in the fundamental range of
the DDS is typically between 40% and 45% of the Nyquist
frequency, depending on the reconstruction filter. With a 1 GHz
SYSCLK, the AD9858 is capable of producing maximum output
frequencies of between 400 MHz and 450 MHz, depending on
the reconstruction filter and the application system
requirements.
REFERENCE SIGNAL
F
REF
= A
F
REF
= A
F
REF
= A
F
OUT
= 2A
F
OUT
= 2A
F
OUT
= A
θ
=
θ
REF
F
OUT
= A
θ
=
θ
REF
F
OUT
= 2A
θ
= 2
θ
REF
+Φ + Φ
'
F
OUT
= A
θ
=
θ
REF
PHASE COHERENT
PHASE CONTINUOUS
WHERE
θ
= PHASE OF OUTPUT SIGNAL,
Φ
= PHASE AT TIME OF FIRST FREQUENCY
TRANSITION, AND
Φ
' = PHASE AT TIME OF SECOND FREQUENCY TRANSITION.
θ
= 2
θ
REF
Φ
θ
= 2
θ
REF
0
For a desired output frequency (FO) and sampling rate
(SYSCLK), the frequency tuning word (FTW) of the AD9858 is
calculated according to the following equation
(
FO
FTW
×
=
)
SYSCLK
N
/
2
where
N
is the phase accumulator resolution in bits (32 in the
AD9858), FO is in Hz, and the FTW is a decimal number.
Once a decimal number has been calculated, it must be rounded
to an integer and converted to a 32-bit binary value. The
frequency resolution of the AD9858 is 0.233 Hz when the
SYSCLK is 1 GHz.
Frequency-Sweeping Mode
The AD9858 provides automated frequency sweeping capability.
This allows the AD9858 to generate frequency-swept signals for
chirped radar or other applications. The AD9858 includes
features that automate much of the task of executing frequency
sweeps.
Figure 31. The Difference between a Phase Continuous
Frequency Change and a Phase Coherent Frequency Change
Single-Tone Mode
When in single-tone mode, the AD9858 generates a signal, or
tone, of a single desired frequency. This frequency is set by the
value loaded by the user into the chip’s frequency tuning word
(FTW) register. This frequency can be between 0 Hz and
somewhat below one-half of the DAC sampling frequency
(SYSCLK). One-half of the sampling frequency is commonly
called the Nyquist frequency. The practical upper limit to the
fundamental frequency range of a DDS is determined by the
characteristics of the external low-pass filter, known as the
reconstruction filter, which must follow the DAC output of the
DDS. This filter reconstructs the desired analog sine wave
output signal from the stream of sampled amplitude values
output by the DAC at the sample rate (SYSCLK).
The frequency sweep feature is implemented through the use of
a frequency accumulator (not to be confused with the phase
accumulator). The frequency accumulator repeatedly adds a
frequency incremental quantity to the current value, thereby
creating new instantaneous frequency tuning words, causing the
frequency generated by the DDS to change with time. The
frequency increment, or step size, is loaded into a register
known as the delta frequency tuning word (DFTW). The rate at
which the frequency is incremented is set by another register,
the delta frequency ramp rate word (DFRRW). Together these
two registers enable the AD9858 to sweep from a beginning
frequency set by the FTW, upwards or downwards, at a desired
rate and frequency step size. The result is a linear frequency
sweep or chirp.
A DDS is a sampled-data system. As the fundamental frequency
of the DDS approaches the Nyquist frequency, the lower first
image approaches the Nyquist frequency from above. As the
fundamental frequency approaches the Nyquist frequency, it
becomes difficult, and finally impossible, to design and
construct a low-pass filter that will provide adequate
attenuation for the first image frequency component.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9858BSVZ | 功能描述:IC DDS DAC 10BIT 1GSPS 100-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數(shù)字合成 (DDS) 系列:- 產(chǎn)品變化通告:Product Discontinuance 27/Oct/2011 標(biāo)準(zhǔn)包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調(diào)節(jié)字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9858FDPCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858TLPCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858XSV | 制造商:Analog Devices 功能描述: |
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