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參數資料
| 型號： | AD9858BSV |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 數字信號處理外設 |
| 英文描述： | 1 GSPS Direct Digital Synthesizer |
| 中文描述： | DSP-NUM CONTROLLED OSCILLATOR, PQFP100 |
| 封裝： | PLASTIC, MS-026AED-HD, TQFP-100 |
| 文件頁數： | 25/32頁 |
| 文件大小： | 1412K |
| 代理商： | AD9858BSV |
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AD9858
Register Bit Descriptions
Rev. A | Page 25 of 32
Control Function Register (CFR)
The CFR is comprised of four bytes located in parallel addresses
0x03 to 0x00. The CFR is used to control the various functions,
features, and modes of the AD9858. The functionality of each
bit is detailed below. Note that the register bits are identified
according to their serial register bit locations beginning with the
most significant bit.
CFR<31:30>: Frequency-Detect Mode Charge Pump Current
These bits are used to set the scale factor for the frequency-
detect mode charge pump output current per Table 7. The
charge pump delivers the scaled output current when the
control logic forces the charge pump into its frequency detect
operating mode. The charge pump’s baseline output current
(I
CP0
) is determined by the external CPISET resistor and is
given by
T
1.24/CPISE
I
CP0
=
The recommended nominal value of the CPISET resistor is
2.4 k, which yields a baseline current of 500 μA.
Table 7.
CFR<31:30>
Scale Value
00b
0
01b
2
10b
3
11b
4
Frequency-Detect
Charge Pump
Notes
I
OUT
= 0 (Default)
I
OUT
= 20 × I
CP0
I
OUT
= 40 × I
CP0
I
OUT
= 60 × I
CP0
CFR<29:27>: Final Closed-Loop Mode
Charge Pump Output Current
These bits are used to set the scale factor for the final closed-
loop mode charge pump output current per Table 8. The charge
pump delivers the scaled output current when the control logic
forces the charge pump into its final closed-loop mode.
Table 8.
CFR<29:27>
CP Scale Value
0xxb
0
100b
1
101b
2
110b
3
111b
4
Final Closed-Loop
Notes
I
OUT
= 0
(
Default)
I
OUT
= I
CP0
I
OUT
= 2 × I
CP0
I
OUT
= 3 × I
CP0
I
OUT
= 4 × I
CP0
CFR<26:24>: Wide Closed-Loop Charge Pump
Output Current
These bits are used to set the scale factor for the wide closed-
loop charge pump output current, see Table 9. The charge pump
delivers the scaled output current when the control logic forces
the charge pump into its wide closed-loop operating mode.
Table 9.
CFR<26:24>
CP Scale Value
000b
0
001b
2
010b
4
011b
6
100b
8
101b
10
110b
12
111b
14
Wide Closed-Loop
Notes
I
OUT
= 0
(
Default
)
I
OUT
= 2 × I
CP0
I
OUT
= 4 × I
CP0
I
OUT
= 6 × I
CP0
I
OUT
= 8 × I
CP0
I
OUT
= 10 × I
CP0
I
OUT
= 12 × I
CP0
I
OUT
= 14 × I
CP0
CFR<23>: AutoClear Frequency Accumulator Bit
When CFR<23> = 0 (default), a new delta frequency word is
applied to the input of the accumulator and added to the
currently stored value.
When CFR<23> = 1, this bit automatically synchronously clears
(loads zeros into) the frequency accumulator for one cycle upon
reception of the FUD sequence indicator.
CFR<22>: AutoClear Phase Accumulator Bit
When CFR<22> = 0 (default), a new frequency tuning word is
applied to the input of the phase accumulator and added to the
currently stored value.
When CFR<22> = 1, this bit automatically synchronously clears
(loads zeros into) the phase accumulator for one cycle upon
reception of the FUD sequence indicator.
CFR<21>: Load Delta-Frequency Timer
When CFR<21> = 1 (default), the contents of the delta
frequency ramp rate word are loaded into the ramp rate timer
(down counter) upon detection of a FUD sequence.
When CFR<21> = 0, the contents of the delta frequency ramp
rate word are loaded into the ramp rate timer upon timeout
with no regard to the state of the FUD sequence indicator (i.e.,
the FUD sequence indicator is ignored).
CFR<20>: Clear Frequency Accumulator Bit
When CFR<20> = 1, the frequency accumulator is
synchronously cleared and is held clear until CFR<20> is
returned to a Logic 0 state (default).
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|---|---|
| AD9858PCB | 1 GSPS Direct Digital Synthesizer |
| AD9858 | 1 GSPS Direct Digital Synthesizer |
| AD9858FDPCB | 1 GSPS Direct Digital Synthesizer |
| AD9859 | 400 MSPS, 10-Bit, 1.8 V CMOS Direct Digital Synthesizer |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9858BSVZ | 功能描述:IC DDS DAC 10BIT 1GSPS 100-TQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 直接數字合成 (DDS) 系列:- 產品變化通告:Product Discontinuance 27/Oct/2011 標準包裝:2,500 系列:- 分辨率（位）:10 b 主 fclk:25MHz 調節字寬（位）:32 b 電源電壓:2.97 V ~ 5.5 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應商設備封裝:16-TSSOP 包裝:帶卷 (TR) |
| AD9858FDPCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858TLPCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:1 GSPS Direct Digital Synthesizer |
| AD9858XSV | 制造商:Analog Devices 功能描述: |
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