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參數資料
| 型號： | AD9874EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | IF Digitizing Subsystem |
| 中文描述： | 中頻數字化子系統 |
| 文件頁數： | 13/40頁 |
| 文件大小： | 744K |
| 代理商： | AD9874EB |
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REV. 0
AD9874
–13–
Address
(Hex)
Bit
Breakdown
Width
Default Value
Name
Description
CLOCK SYNTHESIZER
0x10
(5:0)
6
00
CKR(13:8)
Reference Frequency Divisor (6 MSBs of a 14-Bit Word)
0x11
(7:0)
8
0x38
CKR(7:0)
Reference Frequency Divisor (8 LSBs of a 14-Bit Word)
Default Yields 300 kHz from f
REF
=16.8 MHz; Min = 3, Max = 16383.
0x12
(4:0)
5
0x00
CKN(12:8)
Synthesized Frequency Divisor (5 MSBs of a 13-Bit Word)
0x13
(7:0)
8
0x3C
CKN(7:0)
Synthesized Frequency Divisor (8 LSBs of a 13-Bit Word)
Default Yields 300 kHz from f
CLK
= 18 MHz; Min = 3, Max = 8191
0x14
(6)
(5)
(4:2)
(1:0)
1
1
3
2
0
0
0
3
CKF
CKINV
CKI
CKTM
Enable Fast Acquire
Invert Charge Pump (0 = Source Current to Increase VCO Frequency)
Charge Pump Current in Normal Operation. I
PUMP
= (CKI + 1)
×
0.625 mA
Manual Control of CLK Charge Pump (0 = Off, 1 = Up, 2 = Down, 3 = Normal)
0x15
(5:0)
6
0x0
CKFA(13:8)
CK Fast Acquire Time Unit (6 MSBs of a 14-Bit Word)
0x16
(7:0)
8
0x04
CKFA(7:0)
CK Fast Acquire Time Unit (8 LSBs of a 14-Bit Word)
SSI CONTROL
0x18
(7:0)
8
0x12
SSICRA
SSI Control Register A. See Table III. (Default is FS and CLKOUT Three-Stated)
0x19
(7:0)
8
0x07
SSICRB
SSI Control Register B. See Table III. (16-bit data, maximum drive strength)
0x1A
(3:0)
4
1
SSIORD
Output Rate Divisor. f
CLKOUT
= f
CLK
/SSIORD
ADC TUNING
0x1C
(1)
(0)
1
1
0
0
TUNE_LC
TUNE_RC
Perform Tuning on the LC Portion of the ADC (Cleared When Done)
Perform Tuning on the RC Portion of the ADC (Cleared When Done)
0x1D
(2:0)
3
0
CAPL1(2:0)
Coarse Capacitance Setting for LC Tank (LSB is 25 pF, Differential)
0x1E
(5:0)
6
0x00
CAPL0(5:0)
Fine Capacitance Setting for LC Tank (LSB is 0.4 pF, Differential)
0x1F
(7:0)
8
0x00
CAPR
Capacitance Setting for RC Resonator (64 LSBs of Fixed Capacitance)
TEST REGISTERS AND SPI PORT READ ENABLE
0x37–0x39
(7:0)
8
0x00
TEST
Factory Test Mode. Do not use.
0x3A
(7:4, 2:0)
(3)
7
1
0x0
0
TEST
SPIREN
Factory Test Mode. Do not use.
Enable Read from SPI Port
0x3B
(7:4, 2:0)
(3)
7
1
0x0
0
TEST
TRI
Factory Test Mode. Do not use.
Three-state DOUTB
0x3C–0x3E
(7:0)
1
0x00
TEST
Factory Test Mode. Do not use.
0x3F
(7:0)
8
Subject to Change
ID
Revision ID (Read-Only); A write of 0x99 to this register is equivalent to a power-on reset.
Table I. SPI Address Map (continued)
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PDF描述 |
|---|---|
| AD9875BSTRL | Broadband Modem Mixed-Signal Front End |
| AD9875 | Broadband Modem Mixed-Signal Front End |
| AD9875-EB | Broadband Modem Mixed-Signal Front End |
| AD9875BST | Broadband Modem Mixed-Signal Front End |
| AD9876 | Broadband Modem Mixed-Signal Front End |
相關代理商/技術參數 |
參數描述 |
|---|---|
| AD9874-EB | 制造商:Analog Devices 功能描述: |
| AD9874-EBZ | 功能描述:BOARD EVAL FOR AD9874 制造商:analog devices inc. 系列:- 零件狀態:有效 類型:數字轉換器 頻率:10MHz ~ 300MHz 配套使用產品/相關產品:AD9874 所含物品:板 標準包裝:1 |
| AD9875 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9875BST | 制造商:Analog Devices 功能描述:Modem Chip Single 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10B BROADBAND MODEM MXFE CONVERTER - Tape and Reel |
| AD9875BSTRL | 制造商:Analog Devices 功能描述:Modem Chip Single 48-Pin LQFP T/R |
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