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參數(shù)資料
| 型號： | AD9874EB |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | IF Digitizing Subsystem |
| 中文描述： | 中頻數(shù)字化子系統(tǒng) |
| 文件頁數(shù)： | 30/40頁 |
| 文件大小： | 744K |
| 代理商： | AD9874EB |
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REV. 0
–30–
AD9874
Table XII indicates which AGCA values are reasonable for various
decimation factors. The white cells indicate that the (decimation
factor/AGCA) combination works well. The light gray cells indi-
cate ringing and an increase in the AGC settling time, and the dark
gray cells indicate that the combination results in instability or
near instability in the AGC loop. Setting AGCF = 1 improves the
time-domain behavior at the expense of increased spectral spreading.
Table XII. AGCA Limits if the DVGA is Enabled
AGCA
M
0
1
4
8
E
60
120
300
540
900
D
4
5
6
7
8
9 10 11 12 13 14 15
Lastly, consider the case of a strong out-of-band interferer (i.e.,
–18 dBm to –32 dBm for matched IF input) that is larger than the
target signal and large enough to be tracked by the control loop
based on the output of the DEC1. The ability of the control loop
to track this interferer and set the VGA attenuation to prevent
clipping of the ADC is limited by the accuracy of the digital signal
estimation occurring at the output of DEC1. The accuracy of
the digital signal estimation is a function of the frequency offset
of the out-of-band interferer relative to the IF frequency as shown
in Figure 20. Interferers at increasingly higher frequency offsets
incur larger measurement errors, potentially causing the control
loop to inadvertently reduce the amount of VGA attenuation that
may result in clipping of the ADC. Figure 21c shows the maxi-
mum measured interferer signal level versus the normalized IF
offset frequency (relative to f
CLK
) tolerated by the AD9874 relative
to its maximum target input signal level (0 dBFS = –18 dBm).
Note, the increase in allowable interferer level occurring beyond
0.04 f
CLK
results from the inherent signal attenuation provided
by the ADC’s signal transfer function.
NORMALIZED FREQUENCY OFFSET = (
f
IN
–
f
IF
)/
f
CLK
–6
0.02
–12
0
0.04
0
–3
–9
0.03
0.01
–15
0.05
R
Figure 21c. Maximum Interferer (or Blocker) Input
Level vs. Normalized IF Frequency Offset
Table XIII. SPI Registers Associated with AGC
Address
(Hex)
Bit
Breakdown
Default
Value
Width
Name
0x03
(7)
(6:0)
1
7
0
0x00
ATTEN
AGCG(14:8)
0x04
(7:0)
8
0x00
AGCG(7:0)
0x05
(7:4)
(3:0)
4
4
0
0x00
AGCA
AGCD
0x06
(7)
(6:4)
(3)
(2:0)
1
3
1
3
0
0
0
0
AGCV
AGCO
AGCF
AGCR
System Noise Figure (NF) vs. VGA (or AGC) Control
The AD9874’s system noise figure is a function of the ACG
attenuation and output signal bandwidth. Figure 22a plots the
nominal system NF as a function of the AGC attenuation for
both narrow-band (20 kHz) and wideband (150 kHz) modes
with
f
CLK
= 18 MHz. Also shown on the plot is the SNR that
would be observed at the output for a –2 dBFS input. The high
dynamic range of the ADC within the AD9874 ensures that the
system NF increases gradually as the AGC attenuation is increased.
In narrow-band (BW = 20 kHz) mode, the system noise figure
increases by less than 3 dB over a 12 dB AGC range, while in
wideband (BW = 150 kHz) mode, the degradation is about
5 dB. As a result, the highest instantaneous dynamic range for
the AD9874 occurs with 12 dB of AGC attenuation, since the
AD9874 can accommodate an additional 12 dB peak signal
level with only a moderate increase in its noise floor.
As Figure 22a shows, the AD9874 can achieve an SNR in excess
of 100 dB in narrow-band applications. To realize the full perfor-
mance of the AD9874 in such applications, it is recommended
that the I/Q data be represented with 24 bits. If 16-bit data is used,
the effective system NF will increase because of the quantization
noise present in the 16-bit data after truncation.
3
6
0
15
14
12
13
11
10
9
8
N
9
12
VGA ATTENUATION – dB
SNR = 90.1dBFS
BW = 50kHz
BW = 150kHz
SNR = 82.9dBFS
BW = 10kHz
SNR = 95.1dBFS
SNR = 103.2dB
Figure 22a. Nominal System Noise Figure and Peak SNR
vs. AGCG Setting (f
IF
= 73.35 MHz, f
CLK
= 18 MSPS, and
24-bit I/Q data)
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PDF描述 |
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| AD9875BSTRL | Broadband Modem Mixed-Signal Front End |
| AD9875 | Broadband Modem Mixed-Signal Front End |
| AD9875-EB | Broadband Modem Mixed-Signal Front End |
| AD9875BST | Broadband Modem Mixed-Signal Front End |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9874-EB | 制造商:Analog Devices 功能描述: |
| AD9874-EBZ | 功能描述:BOARD EVAL FOR AD9874 制造商:analog devices inc. 系列:- 零件狀態(tài):有效 類型:數(shù)字轉(zhuǎn)換器 頻率:10MHz ~ 300MHz 配套使用產(chǎn)品/相關(guān)產(chǎn)品:AD9874 所含物品:板 標(biāo)準(zhǔn)包裝:1 |
| AD9875 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9875BST | 制造商:Analog Devices 功能描述:Modem Chip Single 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10B BROADBAND MODEM MXFE CONVERTER - Tape and Reel |
| AD9875BSTRL | 制造商:Analog Devices 功能描述:Modem Chip Single 48-Pin LQFP T/R |
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