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參數(shù)資料
| 型號(hào)： | AD9927BBCZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | 14-Bit CCD Signal Processor with V-Driver and Precision TimingTM Generator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, BGA128 |
| 封裝： | 9 X 9 MM, LEAD FREE, MO-225, CSP_BGA-128 |
| 文件頁數(shù)： | 15/100頁 |
| 文件大小： | 784K |
| 代理商： | AD9927BBCZ |
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AD9927
SYSTEM OVERVIEW
Figure 13 shows the typical system block diagram for the AD9927
in master mode. The CCD output is processed by the AD9927’s
AFE circuitry, which consists of a CDS, VGA, black level clamp,
and ADC. The digitized pixel information is sent to the digital
image processor chip, which performs the postprocessing and
compression. To operate the CCD, all CCD timing parameters
are programmed into the AD9927 from the system microprocessor
through the 3-wire serial interface. From the master clock, CLI,
provided by the image processor or external crystal, the AD9927
generates the CCD’s horizontal and vertical clocks and internal
AFE clocks. External synchronization is provided by a sync
pulse from the microprocessor, which resets the internal
counters and resyncs the VD and HD outputs.
Rev. 0 | Page 15 of 100
CCDIN
GPO1 TO GPO8
H1 TO H8, HL,
RG, VSUB
V1A TO V15, SUBCK
CCD
AD9927
AFETG
V-DRIVER
DIGITAL
IMAGE
PROCESSING
ASIC
DOUT
DCLK
HD, VD
CLI
SERIAL
INTERFACE
SYNC
μP
0
Figure 13. Typical System Block Diagram, Master Mode
Alternatively, the AD9927 can be operated in slave mode. In
this mode, the VD and HD are provided externally from the
image processor, and all AD9927 timing is synchronized with
VD and HD.
The H-drivers for H1 to H8, HL, and RG are included in the
AD9927, allowing these clocks to be directly connected to the
CCD. An H-driver voltage of up to 3.3 V is supported. V1A to
V15 and SUBCK vertical clocks are included as well, allowing
the AD9927 to provide all horizontal and vertical clocks
necessary to clock data out of a CCD.
The AD9927 includes programmable general-purpose outputs
(GPO), which can trigger mechanical shutter and strobe (flash)
circuitry.
Figure 14 and Figure 15 show the maximum horizontal and vertical
counter dimensions for the AD9927. All internal horizontal and
vertical clocking is controlled by these counters, which specify
line and pixel locations. Maximum HD length is 8192 pixels per
line, and maximum VD length is 8192 lines per field.
13-BIT HORIZONTAL = 8192 PIXELS MAX
13-BIT VERTICAL = 8192 LINES MAX
MAXIMUM COUNTER DIMENSIONS
0
Figure 14. Vertical and Horizontal Counters
VD
HD
MAX VD LENGTH IS 8192 LINES
CLI
MAX HD LENGTH IS 8192 PIXELS
0
Figure 15. Maximum VD/HD Dimensions
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9927BBCZRL | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| AD9928 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Channel 14-Bit CCD Signal Processor with V-Driver and Precision Timing Generator |
| AD9928BBCZ | 功能描述:IC CCD SIGNAL PROCESSR 128CSPBGA RoHS:是 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| AD9928BBCZ-60 | 制造商:Analog Devices 功能描述:- Trays |
| AD9928BBCZRL | 功能描述:IC CCD SIGNAL PROCESSR 128CSPBGA RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動(dòng)電話，手機(jī)，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
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