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參數(shù)資料
| 型號： | ADATE207BBP |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Quad Pin Timing Formatter |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA256 |
| 封裝： | MO-192-BAL-2, LBGA-256 |
| 文件頁數(shù)： | 30/36頁 |
| 文件大小： | 374K |
| 代理商： | ADATE207BBP |
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ADATE207
Position
Bits[10:08]
Rev. 0 | Page 30 of 36
Description
PAT_DUTDATA2 Select. A binary encoded data field that selects which edge and which comparator
to drive out of the ADATE207 PAT_DUTDATAx[2] pin.
0x0 = Edge D0 low comparator.
0x1 = Edge D0 high comparator.
0x2 = Edge D1 low comparator.
0x3 = Edge D1 high comparator.
0x4 = Edge D2 low comparator.
0x5 = Edge D2 high comparator.
0x6 = Edge D3 low comparator.
0x7 = Edge D3 high comparator.
Not Used
PAT_DUTDATA1 Select. A binary encoded data field that selects which edge and which comparator
to drive out of the ADATE207 PAT_DUTDATAx[1] pin.
0x0 = Edge D0 low comparator.
0x1 = Edge D0 high comparator.
0x2 = Edge D1 low comparator.
0x3 = Edge D1 high comparator.
0x4 = Edge D2 low comparator.
0x5 = Edge D2 high comparator.
0x6 = Edge D3 low comparator.
0x7 = Edge D3 high comparator.
Not Used
PAT_DUTDATA0 Select. A binary encoded data field that selects which edge and which comparator
to drive out of the ADATE207 PAT_DUTDATAx[0] pin.
0x0 = Edge D0 low comparator.
0x1 = Edge D0 high comparator.
0x2 = Edge D1 low comparator.
0x3 = Edge D1 high comparator.
0x4 = Edge D2 low comparator.
0x5 = Edge D2 high comparator.
0x6 = Edge D3 low comparator.
0x7 = Edge D3 high comparator.
Reset State
0x0
Bit 07
Bits[06:04]
0
0x0
Bit 03
Bits[02:00]
0
0x0
CHIP-SPECIFIC (COMMON) REGISTERS
Name:
Address:
Type:
Software Resets
0x19
Write
Table 33. Software Resets
Position
Bit 15
Bits[14:04]
Bit 03
Description
DLL Ready. Indicates that the internal PLL and DLL are stable after a reset and/or MCLK change.
Not Used.
Error Registers Clear.
Writing a 1 to this bit creates a pulse to clear all the delay generation errors for all channels and
resets the edge generation logic.
Writing a 0 has no affect.
Accumulated Fail Registers Clear.
Writing a 1 to this bit creates a pulse to clear the accumulated fail registers for all channels.
Writing a 0 has no affect.
Reset State
Dynamic
0x000
0x0
Bit 02
0x0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADATE207BBPZ | 功能描述:IC TIMING FORMATTER QUAD 256BGA RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 專用 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 類型:時(shí)鐘/頻率發(fā)生器，多路復(fù)用器 PLL:是 主要目的:存儲(chǔ)器，RDRAM 輸入:晶體 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:1:2 差分 - 輸入:輸出:無/是 頻率 - 最大:400MHz 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:Digi-Reel® 其它名稱:296-6719-6 |
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| ADATE209BBCZ | 制造商:Analog Devices 功能描述:4.0 GBPS DUAL DRIVER - Rail/Tube |
| ADATE209BCPZ | 制造商:Analog Devices 功能描述: |
| ADATE302-02 | 制造商:AD 制造商全稱:Analog Devices 功能描述:500 MHz Dual Integrated DCL with Differential Drive/Receive, Level Setting DACs, and Per Pin PMU |
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