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參數(shù)資料
型號(hào): ADE7169ACPF16-RL
廠商: ANALOG DEVICES INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: Single-Phase Energy Measurement IC with 8052 MCU, RTC and LCD driver
中文描述: ANALOG CIRCUIT, QCC64
封裝: 9 X 9MM, MO-220VMMD, LFCSP-64
文件頁數(shù): 46/140頁
文件大小: 1359K
代理商: ADE7169ACPF16-RL
ADE7169F16
Preliminary Technical Data
current. Figure 24 shows the principle of a di/dt current sensor.
Rev. PrD | Page 46 of 140
MAGNETIC FIELD CREATED BY CURRENT
(DIRECTLY PROPORTIONAL TO CURRENT)
+ EMF (ELECTROMOTIVE FORCE)
– INDUCED BY CHANGES IN
MAGNETIC FLUX DENSITY (di/dt)
02875-0-035
Figure 24. Principle of a di/dt Current Sensor
The flux density of a magnetic field induced by a current is
directly proportional to the magnitude of the current. The
changes in the magnetic flux density passing through a
conductor loop generate an electromotive force (EMF) between
the two ends of the loop. The EMF is a voltage signal, which is
proportional to the di/dt of the current. The voltage output
from the di/dt current sensor is determined by the mutual
inductance between the current-carrying conductor and the
di/dt sensor. The current signal needs to be recovered from the
di/dt signal before it can be used. An integrator is therefore
necessary to restore the signal to its original form. The
ADE7169F16 has a built-in digital integrator to recover the
current signal from the di/dt sensor. The digital integrator on
the Current Channel is switched off by default when the
ADE7169F16 is powered up. Setting INTE bit in the MODE1
register (0x0B) turns on the integrator. Figure 25 to Figure 28
show the magnitude and phase response of the digital
integrator.
FREQUENCY (Hz)
10
G
0
–10
–20
–30
–40
–50
10
2
10
3
02875-0-036
Figure 25. Combined Gain Response of the
Digital Integrator and Phase Compensator
FREQUENCY (Hz)
10
2
10
3
02875-0-037
–88.0
P
–88.5
–89.0
–89.5
–90.0
–90.5
Figure 26. Combined Phase Response of the
Digital Integrator and Phase Compensator
FREQUENCY (Hz)
–1.0
–6.040
70
45
G
50
55
60
65
–1.5
–2.0
–2.5
–3.5
–4.5
–5.5
–3.0
–4.0
–5.0
02875-0-038
Figure 27. Combined Gain Response of the
Digital Integrator and Phase Compensator (40 Hz to 70 Hz)
–89.75
–89.80
–89.85
–89.90
–89.95
–90.00
FREQUENCY (Hz)
P
40
45
70
50
55
60
65
–90.05
–89.70
02875-0-039
Figure 28. Combined Phase Response of the
Digital Integrator and Phase Compensator (40 Hz to 70 Hz)
Note that the integrator has a –20 dB/dec attenuation and an
approximately –90° phase shift. When combined with a di/dt
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