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參數資料
| 型號： | ADP3180 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 6-Bit Programmable 2-, 3-, 4-Phase Synchronous Buck Controller |
| 中文描述： | 6位可編程2 - ，3 - ，4相同步降壓控制器 |
| 文件頁數： | 12/20頁 |
| 文件大小： | 529K |
| 代理商： | ADP3180 |
ADP3180
–12–
Setting the Clock Frequency
The ADP3180 uses a fixed-frequency control architecture. The
frequency is set by an external timing resistor (R
T
). The clock
frequency and the number of phases determine the switching
frequency per phase, which relates directly to switching losses
and the sizes of the inductors and input and output capacitors.
With n = 3 for three phases, a clock frequency of 800 kHz sets
the switching frequency of each phase, f
SW
, to 267 kHz, which
represents a practical trade-off between the switching losses and
the sizes of the output filter components. TPC 1 shows that to
achieve an 800 kHz oscillator frequency, the correct value for R
T
is 249 k
W
. Alternatively, the value for
R
T
can be calculated using:
R
n
f
pF
M
T
SW
=
×
×
(
)
1
5 83
.
1
1 5
.
(1)
where 5.83
pF
and 1.5
M
W
are internal IC component values.
For good initial accuracy and frequency stability, it is recom-
mended to use a 1% resistor.
Soft-Start and Current Limit Latch-Off Delay Times
Because the soft-start and current limit latch-off delay functions
share the DELAY pin, these two parameters must be considered
together. The first step is to set
C
DLY
for the soft-start ramp. This
ramp is generated with a 20 μA internal current source. The value
of
R
DLY
will have a second order impact on the soft-start time
because it sinks part of the current source to ground. However, as
long as
R
DLY
is kept greater than 200 k
W
, this effect is minor. The
value for
C
DLY
can be approximated using:
C
A
V
×
R
t
V
DLY
VID
DLY
SS
VID
=
×
20
2
μ
(2)
where
t
SS
is the desired soft-start time. Assuming an
R
DLY
of
390 k
W
and a desired a soft-start time of 3 ms,
C
DLY
is 36 nF.
The closest standard value for
C
DLY
is 39 nF. Once
C
DLY
has been
chosen,
R
DLY
can be calculated for the current limit latch-off
time using:
R
t
C
DLY
DELAY
DLY
=
×
1 96
.
(3)
If the result for
R
DLY
is less than 200 k
W
, a smaller soft-start time
should be considered by recalculating the equation for
C
DLY
, or a
longer latch-off time should be used. In no case should
R
DLY
be
less than 200 k
W
. In this example, a delay time of 8 ms gives
R
DLY
= 402 k
W
. The closest standard 5% value is 390 k
W.
Inductor Selection
The choice of inductance for the inductor determines the ripple
current in the inductor. Less inductance leads to more ripple cur-
rent, which increases the output ripple voltage and conduction
losses in the MOSFETs, but allows using smaller inductors and,
for a specified peak-to-peak transient deviation, less total output
capacitance. Conversely, a higher inductance means lower ripple
current and reduced conduction losses but requires larger
inductors and more output capacitance for the same peak-to-
peak transient deviation. In any multiphase converter, a practical
value for the peak-to-peak inductor ripple current is less than
50% of the maximum dc current in the same inductor. Equation 4
shows the relationship between the inductance, oscillator fre-
quency, and peak-to-peak ripple current in the inductor.
Equation 5 can be used to determine the minimum inductance
based on a given output ripple voltage:
(
×
I
V
D
f
L
R
VID
SW
=
×
)
1
(4)
L
V
R
n
D
f
V
VID
O
SW
RIPPLE
≥
×
×
×
×
(
)
(
)
1
(5)
Solving Equation 5 for a 10 mV p-p output ripple voltage yields:
L
V
m
kHz
mV
nH
≥
×
×
10
(
)
×
=
1 5
.
1 3
.
1 0 375
.
267
456
If the ripple voltage ends up less than that designed for, the
inductor can be made smaller until the ripple value is met. This
will allow optimal transient response and minimum output
decoupling.
The smallest possible inductor should be used to minimize the
number of output capacitors. Choosing a 600 nH inductor is
a good choice for a starting point and gives a calculated ripple
current of 8.2 A. The inductor should not saturate at the peak
current of 25.8 A and should be able to handle the sum of the
power dissipation caused by the average current of 22.7 A in the
winding and core loss.
Another important factor in the inductor design is the DCR,
which is used for measuring the phase currents. A large DCR will
cause excessive power losses, while too small a value will lead to
increased measurement error. A good rule of thumb is to have the
DCR be about 1 to 1 times the droop resistance (R
O
). For our
example, we are using an inductor with a DCR of 1.6 m
W
.
Designing an Inductor
Once the inductance and DCR are known, the next step is to
either design an inductor or find a standard inductor that comes
as close as possible to meeting the overall design goals. It is also
important to have the inductance and DCR tolerance specified
to control the accuracy of the system. 15% inductance and 8%
DCR (at room temperature) are reasonable tolerances that most
manufacturers can meet.
The first decision in designing the inductor is to choose the core
material. There are several possibilities for providing low core
loss at high frequencies. Two examples are the powder cores (e.g.,
Kool-Mμ
from Magnetics, Inc. or Micrometals) and the gapped
soft ferrite cores (e.g., 3F3 or 3F4 from Philips). Low frequency
powdered iron cores should be avoided due to their high core
loss, especially when the inductor value is relatively low and the
ripple current is high.
The best choice for a core geometry is a closed-loop type, such
as a pot core, PQ, U, and E core, or toroid. A good compromise
between price and performance is a core with a toroidal shape.
There are many useful references for quickly designing a power
inductor, such as:
Magnetics Design References
∑
Magnetic Designer Software
Intusoft (www.intusoft.com)
∑
Designing Magnetic Components for High-Frequency DC-DC
Converters
, by William T. McLyman, Kg Magnetics, Inc.
ISBN 1883107008
REV. 0
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