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參數資料
| 型號： | L64118 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA256 |
| 封裝： | PLASTIC, BGA-256 |
| 文件頁數： | 25/68頁 |
| 文件大小： | 877K |
| 代理商： | L64118 |
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L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101) 31
RCLK
Receive Serial Data Clock
Input
This signal is used for the receive clock input in the
enhanced UART mode.
RTSn0
Request to Send Port 0
Output
When this general-purpose, programmable control signal
is reset to LOW, Port 1 is ready to send data through
TxD1. This signal is set and reset by programming the
RTS bit in the SIO Command register. By default, this
signal is not asserted after reset.
GPIO10
Bidirectional
RTSn0 can serve as a general-purpose I/O signal
(GPIO10) by setting bit 1 in the General-Purpose Mode
register.
RTSn1
Request to Send Port1
Output
When this general-purpose, programmable control signal
is reset to LOW, Port 1 is ready to send data through
TxD1. This signal is set and reset by programming the
RTS bit in the SIO Command register.
RXD0
Receive Data Port 0
Input
This signal provides serial data from an external RS232
device. Its protocol is similar to that of TxD0. The receive
baud rate can be programmed in the SIO Baud Rate
register. The data received on RXD0 is latched in the
Receive register of Port 0.
GPIO11
Bidirectional
RXD0 can serve as a general-purpose I/O signal
(GPIO11) by setting bit 1 in the General-Purpose Mode
register.
RXD1/ICE_RX
Receive Data Port 1
Input
This pin serves either as the Receive port signal of SIO1,
or as the ICEport receive input for the ICEport module.
The strap option on GPIO[43] controls this pin’s
functionality and usage. If GPIO[43] is sampled HIGH
during reset, this pin serves as RXD1. In that case, this
signal provides serial data from an external RS232
device.
118bds Page 31 Wednesday, February 3, 1999 12:37 PM
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