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參數資料
| 型號： | L64118 |
| 廠商： | LSI CORP |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA256 |
| 封裝： | PLASTIC, BGA-256 |
| 文件頁數： | 39/68頁 |
| 文件大小： | 877K |
| 代理商： | L64118 |
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44
L64118 MPEG-2 Transport Controller with Embedded MIPS CPU (TR4101)
SC0_C4
SmartCard 0 Pin 4
Bidirectional
This signal is connected to the C4 pin on the SmartCard.
This signal should be pulled up by an external pull-up
resistor after reset.
SC0_C8
SmartCard 0 Pin 8
Bidirectional
This signal is connected to the C8 pin on the SmartCard.
This signal should be pulled up by an external pull-up
resistor after reset.
SC0_CLK
SmartCard 0 Clock
Output
This signal is the output clock for SmartCard 0.
GPIO33
Bidirectional
SC0_CLK can serve as a general-purpose I/O signal
(GPIO33) by setting bit 4 in the General-Purpose Mode
register.
By default, this signal is not asserted after reset.
SC0_DETECT
SmartCard 0 Detect
Input
When HIGH, this signal indicates that a card is inserted
in slot 0.
GPIO31
Bidirectional
SC0_DETECT can serve as a general-purpose I/O signal
(GPIO31) by setting bit 4 in the General-Purpose Mode
register.
By default, this signal oats after reset.
SC0_I/O
SmartCard 0 I/O
Bidirectional
This signal transfers data (using the coupler) between
SmartCard 0 and the SmartCard port of the L64118. It is
open-drain. This signal must be pulled up by an external
resistor after reset.
SC0_RSTn
SmartCard 0 Reset
Output
This signal resets SmartCard 0.
GPIO30
Bidirectional
SC0_RSTn can serve as a general-purpose I/O signal
(GPIO30) by setting bit 4 in the General-Purpose Mode
register.
By default, this signal is not asserted after reset.
118bds Page 44 Wednesday, February 3, 1999 12:37 PM
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