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參數資料
| 型號： | LTC4268IDKD-1#PBF |
| 廠商： | Linear Technology |
| 文件頁數： | 15/46頁 |
| 文件大小： | 419K |
| 描述： | IC PD HIGH POWER W/CNTRL 32-DFN |
| 產品培訓模塊： | Power over Ethernet |
| 標準包裝： | 52 |
| 類型： | 以太網供電開關（PoE） |
| 應用： | 遠程外設（工業控制，相機，數據訪問） |
| 內部開關： | 是 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-WFDFN 裸露焊盤 |
| 供應商設備封裝： | 32-DFN（7x4）裸露焊盤 |
| 包裝： | 管件 |
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42681fc
LTC4268-1
15
applicaTions inForMaTion
Table 1. LTC4268-1 Operational Mode as a Function
of V
PORT
Voltage
V
PORT
MODE OF OPERATION
0V to 1.4V
Inactive
1.5V to 10.1V
25k Signature Resistor Detection
10.3V to 12.4V
Classification Load Current Ramps Up from 0%
to 100%
12.5V to UVLO*
Classification Load Current Active
UVLO* to 57V
Power Applied to PD Load
*UVLO includes hysteresis.
Rising input threshold @ 38.9V
Falling input threshold @ 30.6V
The IEEE 802.3af specification requires the PSE to use
a DV/DI measurement technique to keep the DC offset
voltage of the diode bridge from affecting the signature
resistance measurement. However, the diode resistance
appears in series with the signature resistor and must
be included in the overall signature resistance of the PD.
The LTC4268-1 compensates for the two series diodes
in the signature path by offsetting the internal resistance
so that a PD built with the LTC4268-1 meets the IEEE
802.3af specification.
In some designs that include an auxiliary power option,
such as an external wall adapter, it is necessary to con-
trol whether or not the PD is detected by a PSE. With the
LTC4268-1, the 25k signature resistor can be enabled or
disabled with the SHDN pin (Figure 4). Taking the SHDN
pin high will reduce the signature resistor to 10k which is
an invalid signature per the IEEE 802.3af specifications.
This will prevent a PSE from detecting and powering the
PD. This invalid signature is present in the PSE probing
range of 2.8V to 10V. When the input rises above 10V,
the signature resistor reverts to 25k to minimize power
dissipation in the LTC4268-1. To disable the signature,
tie SHDN to V
PORTP
. Alternately, the SHDN pin can be
driven high with respect to V
PORTN
. When SHDN is high,
all functions are disabled. For normal operation tie SHDN
to V
PORTN
.
CLASSIFICATION
Once the PSE has detected a PD, the PSE may optionally
classify the PD. Classification provides a method for more
efficient allocation of power by allowing the PSE to identify
lower-power PDs and assign the appropriate power level
to these devices. For each class, there is an associated
load current that the PD asserts onto the line during clas-
sification probing. The PSE measures the PD load current
in order to assign the proper PD classification. Class 0 is
included in the IEEE 802.3af specification to cover PDs
that do not support classification. Class 1-3 partition PDs
into three distinct power ranges as shown in Table 2.
Table 2. Summary of IEEE 802.3af Power Classifications and
LTC4268-1 R
CLASS
Resistor Selection
CLASS USAGE
MAXIMUM
POWER LEVELS
AT INPUT OF PD
(W)
NOMINAL
CLASSIFICATION
LOAD CURRENT
(mA)
LTC4268-1
RCLASS
RESISTOR
(W, 1%)
0
Default
0.44 to 13.0
<5
Open
1
Optional
0.44 to 3.84
10.5
124
2
Optional
3.84 to 6.49
18.5
69.8
3
Optional
6.49 to 13.0
28
45.3
4
Reserved by IEEE. See Apps
40
30.9
5
Undefined by IEEE. See Apps
56
22.1
Class 4 was reserved by the IEEE 802.3af committee
for future use and has been reassigned as a high power
indicator by IEEE 802.3at. The new Class 5 defined here
is available for system vendors to implement a unique
V
PORTP
V
PORTN
SHDN
LTC4268-1
SIGNATURE DISABLE
42681 F04
25k SIGNATURE
RESISTOR
16k
TO
PSE
Figure 4. 25k Signature Resistor With Disable
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