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參數資料
型號: LTC4268IDKD-1#PBF
廠商: Linear Technology
文件頁數: 30/46頁
文件大小: 419K
描述: IC PD HIGH POWER W/CNTRL 32-DFN
產品培訓模塊: Power over Ethernet
標準包裝: 52
類型: 以太網供電開關(PoE)
應用: 遠程外設(工業控制,相機,數據訪問)
內部開關:
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 32-WFDFN 裸露焊盤
供應商設備封裝: 32-DFN(7x4)裸露焊盤
包裝: 管件
LTC4268-1
30
42681fc
applicaTions inForMaTion
behavioris the most apt to be bistable. Capacitive loads
that exhibit I = V
2
/R behavior are less susceptible.
Secondary Leakage Inductance
Leakage inductance on the secondary forms an inductive
divider on the transformer secondary, reducing the size
of the flyback pulse. This increases the output voltage
target by a similar percentage. Note that unlike leakage
spike behavior; this phenomenon is independent of load.
Since the secondary leakage inductance is a constant
percentage of mutual inductance (within manufacturing
variations), the solution is to adjust the feedback resistive
divider ratio to compensate.
Winding Resistance Effects
Primary or secondary winding resistance acts to reduce
overall efficiency (P
OUT
/P
IN
). Secondary winding resistance
increases effective output impedance, degrading load
regulation. Load compensation can mitigate this to some
extent but a good design keeps parasitic resistances low.
Bifilar Winding
A bifilar or similar winding is a good way to minimize
troublesome leakage inductances. Bifilar windings also
improve coupling coefficients and thus improve cross
regulation in multiple winding transformers. However,
tight coupling usually increases primary-to-secondary
capacitance and limits the primary-to-secondary
breakdown voltage, so it isnt always practical.
Primary Inductance
The transformer primary inductance, L
P
,  is  selected 
based on the peak-to-peak ripple current ratio (X) in the
transformer relative to its maximum value.
As a general rule, keep X in the range of 20% to 40%
(i.e., X = 0.2 to 0.4). Higher values of ripple will increase
conduction losses, while lower values will require larger
cores.
Ripple current and percentage ripple is largest at minimum
duty cycle; in other words, at the highest input voltage.
L
P
 is calculated from:
L
P
=
V
IN(MAX)
DC
MIN
(
)
2
f
OSC
X
MAX
P
IN
=
V
IN(MAX)
DC
MIN
(
)
2
Eff
f
OSC
X
MAX
P
OUT
where:
   f
OSC
 is the oscillator frequency
   DC
MIN
 is the DC at maximum input voltage
   X
MAX
 is ripple current ratio at maximum input voltage
Using common high power PoE values a 48V (41V < V
IN
 
< 57V) to 5V/5.3A Converter with 90% efficiency, P
OUT
=
26.5W and P
IN
 = 29.5W Using X = 0.4 N = 1/8 and f
OSC
 
= 200kHz:
 
DC
MIN
=
1
1+
N  V
IN(MAX)
V
OUT
=
1
1+
1
8
57
5
= 41.2%
L
P
=
57V  0.412
(
)
2
2   kHz    .4  2  .  W
=260礖
Optimization might show that a more efficient solution
is obtained at higher peak current but lower inductance
and the associated winding series resistance. A simple
spreadsheet program is useful for looking at trade-offs.
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